COM20022I3V-HD SMSC, COM20022I3V-HD Datasheet - Page 40

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COM20022I3V-HD

Manufacturer Part Number
COM20022I3V-HD
Description
Network Controller & Processor ICs ARCNET Contrllr
Manufacturer
SMSC
Datasheet

Specifications of COM20022I3V-HD

Data Rate
10 Mbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
TQFP-48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Revision 02-27-06
2,1,0 Sub Address 2,1,0
BIT
BIT
7-3
7
6
5
Reset
Command
Chaining Enable
Transmit Enable
Reserved
BIT NAME
BIT NAME
SUBAD
2,1,0
RESET
CCHEN
TXEN
SYMBOL
SYMBOL
Table 6.11 - Configuration Register
Table 6.10 - Sub Address Register
DATASHEET
These bits are undefined.
These bits determine which register at address 07 may be
accessed. The combinations are as follows:
SUBAD2
SUBAD1 and SUBAD0 are exactly the same as exist in the
Configuration Register. SUBAD2 is cleared automatically by
writing the Configuration Register.
A software reset of the COM20022I 3V is executed by
writing a logic "1" to this bit. A software reset does not
reset the microcontroller interface mode, nor does it affect
the Configuration Register. The only registers that the
software reset affect are the Status Register, the Next ID
Register, and the Diagnostic Status Register. This bit
must be brought back to logic "0" to release the reset.
This bit, if high, enables the Command Chaining operation
of the device. Please refer to the Command Chaining
section for further details. A low level on this bit ensures
software compatibility with previous SMSC ARCNET
devices.
When low, this bit disables transmissions by keeping
nPULSE1, nPULSE2 if in non-Backplane Mode, and
nTXEN pin inactive. When high, it enables the above
signals to be activated during transmissions. This bit
defaults low upon reset. This bit is typically enabled once
the Node ID is determined, and never disabled during
normal operation. Please refer to the Improved
Diagnostics section for details on evaluating network
activity.
0
0
0
0
1
1
1
1
Page 40
SUBAD1 SUBAD0 Register
10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Board RAM
0
0
1
1
0
0
1
1
DESCRIPTION
DESCRIPTION
0
1
0
1
0
1
0
1
Tentative ID \ (Same
Node ID
Setup 1
Next ID
Setup 2
Bus Control
DMA Count
Reserved
\ as in
/ Config
/ Register)
SMSC COM20022I 3V
Datasheet

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