H7BX-A AC100-240 Omron, H7BX-A AC100-240 Datasheet - Page 13

• Manufacturer Part Number: H7BX-A AC100-240
• Description: 1-stg 72x72 Multifunc Counter
• Manufacturer: Omron

Specifications of H7BX-A AC100-240

• Display Type: LCD Backlight
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

■ Input Modes and Present Value
CP1: Count input; CP2: Prohibit input
CP1: Prohibit input; CP2: Count input
A
A
A
B
must be greater than the minimum signal width. (See note 2.)
must be greater than the minimum signal width. (See note 2.)
must be greater than the minimum signal width. (See note 2.)
must be at least 1/2 the minimum signal width. (See note 2.)
CP1
(See note 3.)
CP2
Present
value
CP1
CP2
Present
value
CP1
CP2
Present
value
CP1
CP2
Present
value
H
L
H
L
0
H
L
H
L
0
H
L
H
L
0
H
L
H
L
0
0
0
0
0
B B B B
1
1
UP/DOWN C: Quadrature Input Mode
UP/DOWN A: Command Input Mode
1
1
2
2
UP (Increment) Mode
2
3
3
A
Prohibit
2
A
A
2
Prohibit
2
3
1
1
(See note 1.)
A
3
A
A
4
2
2
4
5
3
3
5
CP1: Count input; CP2: Prohibit input
CP1: Prohibit input; CP2: Present value
Note 1. If the configuration is set to dual counter, CP1 and CP2 inputs will operate
A
A
must be greater than the minimum signal width. (See note 2.)
must be greater than the minimum signal width. (See note 2.)
2.
3. The meaning of the H and L symbols in the tables is explained below.
CP1
(See note 3.)
CP2
Present
value
CP1
CP2
Present
value
CP1
CP2
Present
value
in the same way as the count input (CP1) of UP (increment) mode.
least 1/2 the minimum signal width. If they are less, a count error of 1
may occur.
Minimum signal width: 16.7 ms (when maximum counting speed = 30 Hz)
100 s (when maximum counting speed = 5 kHz)
Symbol
A
H
L
H
L
0
H
L
H
L
0
H
L
H
L
0
must be greater than the minimum signal width and
n
0
n
Input method
n 1
1
H
L
Multifunction Counter
UP/DOWN B: Individual Input Mode
n 1
n 2
DOWN (Decrement) Mode
2
3
No-voltage input
A
n 2
(NPN input)
Short-circuit
Prohibit
2
A
Open
Prohibit
n 3
1
H7BX
1
A
n 3
A
n 4
2
Voltage input
4.5 to 30 VDC
(PNP input)
n 4
0 to 2 VDC
B
must be at
n 5
3
n 5
13