CYIH1SM1000AA-HHCS Cypress Semiconductor Corp, CYIH1SM1000AA-HHCS Datasheet - Page 47

• Manufacturer Part Number: CYIH1SM1000AA-HHCS
• Description: IC SPACE IMAGE SENSOR 84-JLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYIH1SM1000AA-HHCS

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

In Double Sampling / Destructive readout, one of these registers
is typically dedicated to addressing the lines to read, and the
other is used for addressing the lines to reset as part of the
electronic shutter operation.
In Correlated Double Sampling / Non-Destructive Readout, it is
the user's choice whether one or both shift registers will be used.
Both Y shift registers can be initialized to a position indicated by
an on-chip address register. This address register is written by
the user through the parallel sensor programming interface. With
this
(region-of-interest) is possible.
Both registers can be advanced one position at a time under user
control.
8.1.4 Pixel Addressing
Pixels are read from left to right, generating a pixel-sequential
output signal for each line. The pixel addressing is similar to the
line addressing.
Close to the column amplifiers resides a horizontal shift register
for pixel/column addressing. This register is one-hot, i.e. it
contains a pattern like "00001000000", at a time pointing to
exactly one pixel and one column amplifier.
Line acquisition is done by sequencing over all pixels of interest
and applying each time the required pixel readout and ADC
control signals.
The X shift register can be initialized to a position indicated by an
on-chip address register. This address register is written by the
user through the parallel sensor programming interface. With this
programmable
(region-of-interest) is possible. The X register can be advanced
one position under user control. This requires a pixel clock signal
at twice the frequency of the desired pixel rate.
8.1.5 Column Amplifiers
At the bottom of each column of pixels sits one column amplifier,
for sampling the addressed pixel's signal and reset levels. These
signals are then locally hold until that particular pixel is sent to
the output channel, in this case PGA, multiplexer, buffer, and
ADC.
The combination of column amplifiers and PGA can perform
Double Sampling: in this case a pixel's signal level is read into
the structures, then the pixel is reset, then the reset level is read
into the structures and subtracted from the previously-stored
signal level, cancelling fixed pattern noise.
In Correlated Double Sampling mode the column amplifiers are
used in bypass mode, and the raw signal level (which can be
either a dark reset level or a post-illumination signal level) is sent
to the output amplifier, and then to the output for storage and
correlated subtraction off-chip. This cancels fixed pattern noise
as well as temporal KTC noise.
Document Number: 001-54123 Rev. *A
programmable
initial
initial
position
position
windowed
windowed
readout
readout
8.1.6 Input Signal Multiplexer
An analogue signal multiplexer with six inputs connects a
number of sources to the output buffer.
One input always is connected to the pixel-serial output of the
pixel array.
Four inputs are connected to analogue input pins and are
intended for monitoring voltages in the neighborhood of the
sensor.
The last multiplexer input is connected to the on-chip temper-
ature sensor.
The multiplexer is controlled by an internal register, written
through the parallel sensor programming interface.
8.1.7 Programmable Gain Amplifier (PGA)
A voltage amplifier conditions the output signal of the multiplexer
for conversion by the ADC. Signal gain and offset can be
controlled by a register written through the parallel sensor
programming interface.
When connected to the pixel array, the PGA also subtracts pixel
black level from pixel signal level when in DS/DR mode.
8.1.8 Parallel Sensor Programming Interface
The sensor is controlled via a number of on-chip settings
registers for X and Y addressing, PGA gain and offset, one-off
calibration of the column amplifiers, ...
These registers are written by the user through a parallel bus.
8.1.9 12-bit Analog to Digital Convertor (ADC)
The on-chip ADC is a 12 bit pipelined convertor. It has a latency
of 6.5 pixel clock cycles, i.e. it samples the input on a rising clock
edge, and outputs the converted signal 6 pixel clock periods
afterwards on the falling edge.
The ADC contains its own SPI serial interface for the optional
upload of calibration settings, enhancing its performance.
The ADC is electrically isolated from the actual sensor core:
when unused it can be left non-powered for lower dissipation,
and without risk for latch-up.
When used, the input voltage range of the ADC is set with a
two-node voltage divider connected to pins VLOW_ADC and
VHIGH_ADC.
The ADC has an accuracy of 10 bit at 5 Mhz operation speed.
8.1.10 Temperature Sensor
A PN-junction type temperature sensor is integrated on the chip.
The temperature-proportional voltage at its output can be routed
to the ADC through one of the six analogue inputs of the multi-
plexer.
The
device-to-device base. Its nominal response is -4.64 mV/°C .
temperature
sensor
CYIH1SM1000AA-HHCS
must
be
calibrated
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