CYIH1SM1000AA-HHCS Cypress Semiconductor Corp, CYIH1SM1000AA-HHCS Datasheet - Page 11

• Manufacturer Part Number: CYIH1SM1000AA-HHCS
• Description: IC SPACE IMAGE SENSOR 84-JLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYIH1SM1000AA-HHCS

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Document Number: 001-54123 Rev. *A
Electrical Specification
No
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
11
1
2
3
4
5
6
7
8
9
Total power supply current stand-by
Total power supply current, operational
Power supply current to ADC, opera-
tional: analog + digital
Power supply current to image core,
operational
Input impedance digital input
Input impedance ADC input
Output amplifier voltage range
Output amplifier gain setting 0
Output amplifier gain setting 1
Output amplifier gain setting 2
Output amplifier gain setting 3
Output amplifier offset setting 0
Output amplifier offset setting 31
Output amplifier offset setting 32
Output amplifier offset setting 63
ADC ladder network resistance
ADC Differential non linearity
ADC Integral non linearity
ADC set-up time
ADC hold time
ADC delay time
ADC latency
ADC ideal input range
Saturation voltage output swing
Output range
Linear range of pixel signal swing
Linear range
Full well charge
Quantum efficiency x Fillfactor
Spectral response
Characteristic
0.86
1.30
0.43
0.80
0.85
1.20
Min
2.2
NA
1.9
3.8
7.2
NA
NA
NA
NA
NA
0.8
NA
NA
16
35
17
14
10
40
60
90
3
3
5
18.5
15.5
2.45
0.93
1.35
0.51
0.90
1.49
0.75
33.3
Typ
100
NA
NA
2.1
4.1
7.7
1.8
NA
NA
NA
6.5
NA
NA
37
19
50
82
45
1
7
8
1.40
Max
1.0
0.6
1.0
NA
NA
NA
2.6
NA
2.3
4.4
8.2
NA
NA
NA
NA
2.0
2.1
NA
NA
NA
NA
NA
20
21
40
21
17
11
18
Unit
mA
mA
mA
MΩ
MΩ
mA
ke-
ke-
ke-
kΩ
lsb
lsb
ns
ns
ns
%
%
V
V
V
V
V
V
V
V
V
-
-
-
-
-
CYIH1SM1000AA-HHCS
ADC at 5MHz sampling rate
Measured
ADC at 5MHz sampling rate
Measured
Nominal 1
measured reference
Nominal 2
relative to setting 0
Nominal 4
relative to setting 0
Nominal 8
relative to setting 0
0 decodes to middle value
Typical value
Analog_in stable to CLK_ADC
rising
Analog_in stable after
CLK_ADC rising edge
Cycles of CLK_ADC
VLOW_ADC to VHIGH_ADC
VDD_RES=3.3V
Measured with PGA in unity
gain, offset=0.8V, low is dark,
high is bright.
Measured within ±1%
Measured within ±5%
Measured with
VDD_RES=3.3V
Measured between 500 nm
and 650 nm. Refer to section
6.3.1
Measured average over
400-900nm.
for complete curve.
Remarks
Page 11 of 71
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