EP4CGX75DF27C7N Altera, EP4CGX75DF27C7N Datasheet - Page 102

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EP4CGX75DF27C7N

Manufacturer Part Number
EP4CGX75DF27C7N
Description
Cyclone IV GX
Manufacturer
Altera
Series
CYCLONE® IV GXr

Specifications of EP4CGX75DF27C7N

Number Of Logic Elements/cells
73920
Number Of Labs/clbs
4620
Total Ram Bits
4257792
Number Of I /o
310
Number Of Gates
-
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
*
Operating Temperature
0°C ~ 85°C
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
5–40
Cyclone IV Device Handbook, Volume 1
Table 5–9. Loop Filter Resistor Value Control (Part 2 of 2)
Table 5–10. Loop Filter Control of High Frequency Capacitor
Bypassing a PLL Counter
Bypassing a PLL counter results in a divide (N, C0 to C4 counters) factor of one.
Table 5–11
Table 5–11. PLL Counter Settings
To bypass any of the PLL counters, set the bypass bit to 1. The values on the other bits
are then ignored.
Note to
(1) Bypass bit.
X
X
LFR[4]
1
1
1
1
Table
X
X
lists the settings for bypassing the counters in PLLs of Cyclone IV devices.
PLL Scan Chain Bits [0..8] Settings
LFC[1]
5–11:
X
X
0
0
1
LFR[3]
X
X
1
1
1
1
LSB
X
X
X
X
LFR[2]
0
0
1
1
X
X
LFC[0]
X
X
Chapter 5: Clock Networks and PLLs in Cyclone IV Devices
0
1
1
LFR[1]
1
0
MSB
(1)
(1)
0
1
0
1
PLL counter bypassed
PLL counter not bypassed
© December 2010 Altera Corporation
LFR[0]
0
1
0
0
Setting (Decimal)
Description
0
1
3
PLL Reconfiguration
(Decimal)
Setting
24
27
28
30

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