DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 43

• Manufacturer Part Number: DSPIC33EP512MU810T-I/PT
• Description: 100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP512MU810T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 512KB (170K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 24K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.0
The
PIC24EPXXXGU810/814 architecture features sepa-
rate program and data memory spaces and buses. This
architecture also allows the direct access of program
memory from the data space during code execution.
FIGURE 4-1:
 2009-2011 Microchip Technology Inc.
Note:
Note 1:
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
MEMORY ORGANIZATION
2:
dsPIC33EPXXXMU806/810/814
This data sheet summarizes the features
of the dsPIC33EPXXXMU806/810/814
and PIC24EPXXXGU810/814 families of
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
Section
(DS70613) of the “dsPIC33E/PIC24E
Family Reference Manual”, which is avail-
able
(www.microchip.com).
Memory areas are not shown to scale.
Reset location is controlled by Reset Target Vector Select bit (RSTPRI). See
from
PROGRAM MEMORY MAP FOR dsPIC33EPXXXMU806/810/814 and
PIC24EPXXXGU810/814 DEVICES
4.
the
dsPIC33EP256MU806/810/814 and
“Program
Microchip
PIC24EP256GU810/814
Interrupt Vector Table
Device Configuration
(87552 instructions)
GOTO Instruction
GOTO Instruction
Auxiliary Program
Auxiliary Interrupt
DEVID (2 Words)
Reset Address
Reset Address
Unimplemented
Flash Memory
User Program
Flash Memory
Write Latch
Reserved
(Read ‘0’s)
Reserved
Reserved
Registers
Reserved
Vector
web
Memory”
(2)
(2)
(2)
(2)
site
and
Preliminary
(1)
4.1
The
dsPIC33EPXXXMU806/810/814
PIC24EPXXXGU810/814 devices is 4M instructions.
The space is addressable by a 24-bit value derived
either from the 23-bit PC during program execution, or
from table operation or data space remapping as
described in
Data Memory
User application access to the program memory space
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD/TBLWT operations, which use TBLPAG<7> to
permit access to the Configuration bits and Device ID
sections of the configuration memory space.
The memory map for the dsPIC33EPXXXMU806/810/
814 and PIC24EPXXXGU810/814 devices is shown in
Figure
dsPIC33EP512MU810/814 and
PIC24EP512GU810/814
program
4-1.
Interrupt Vector Table
Device Configuration
(175104 instructions)
GOTO Instruction
GOTO Instruction
Auxiliary Program
Auxiliary Interrupt
DEVID (2 Words)
Reset Address
Program Address Space
Reset Address
Section 29.0 “Special Features”
Unimplemented
Flash Memory
User Program
Flash Memory
Write Latch
Reserved
Reserved
Reserved
(Read ‘0’s)
Registers
Reserved
Vector
Section 4.6 “Interfacing Program and
Spaces”.
address
(2)
(2)
(2)
(2)
0x000000
0x000002
0x000004
0x0001FE
0x000200
0x02ABFE
0x02AC00
0x0557FE
0x055800
0x7FBFFE
0x7FC000
0x7FFFF8
0x7FFFFA
0x7FFFFC
0x7FFFFE
0x800000
0xF7FFFE
0xF80000
0xF80012
0xF80014
0xF9FFFE
0xFA0000
0xFA00FE
0xFA0100
0xFEFFFE
0xFF0000
0xFF0002
0xFFFFFE
memory
for more information.
DS70616E-page 43
space
of
and
the