DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 258

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DSPIC33EP512MU810T-I/PT

Manufacturer Part Number
DSPIC33EP512MU810T-I/PT
Description
100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP512MU810T-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
512KB (170K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
24K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP512MU810T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
14.1
REGISTER 14-1:
DS70616E-page 258
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12-10
bit 9-7
bit 6-5
bit 4
bit 3
bit 2-0
U-0
U-0
Input Capture Registers
Unimplemented: Read as ‘0’
ICSIDL: Input Capture Stop in Idle Control bit
1 = Input capture will Halt in CPU Idle mode
0 = Input capture will continue to operate in CPU Idle mode
ICTSEL<12:10>: Input Capture Timer Select bits
111 = Peripheral clock (F
110 = Reserved
101 = Reserved
100 = Clock source of Timer1 is the clock source of the ICx (only the synchronous clock is supported)
011 = Clock source of Timer5 is the clock source of the ICx
010 = Clock source of Timer4 is the clock source of the ICx
001 = Clock source of Timer2 is the clock source of the ICx
000 = Clock source of Timer3 is the clock source of the ICx
Unimplemented: Read as ‘0’
ICI<1:0>: Number of Captures per Interrupt Select bits
(this field is not used if ICM<2:0> = 001 or 111)
11 = Interrupt on every fourth capture event
10 = Interrupt on every third capture event
01 = Interrupt on every second capture event
00 = Interrupt on every capture event
ICOV: Input Capture Overflow Status Flag bit (read-only)
1 = Input capture buffer overflow occurred
0 = No input capture buffer overflow occurred
ICBNE: Input Capture Buffer Not Empty Status bit (read-only)
1 = Input capture buffer is not empty, at least one more capture value can be read
0 = Input capture buffer is empty
ICM<2:0>: Input Capture Mode Select bits
111 = Input capture functions as interrupt pin only in CPU Sleep and Idle mode (rising edge detect
110 = Unused (module disabled)
101 = Capture mode, every 16th rising edge (Prescaler Capture mode)
100 = Capture mode, every 4th rising edge (Prescaler Capture mode)
011 = Capture mode, every rising edge (Simple Capture mode)
010 = Capture mode, every falling edge (Simple Capture mode)
001 = Capture mode, every edge, rising and falling (Edge Detect mode (ICI<1:0>) is not used in this
000 = Input Capture module is turned off
R/W-0
U-0
ICxCON1: INPUT CAPTURE x CONTROL REGISTER 1
only, all other control bits are not applicable)
mode)
ICI<1:0>
HC = Cleared by Hardware
W = Writable bit
ICSIDL
R/W-0
R/W-0
P
) is the clock source of the ICx
R/HC/HS-0
Preliminary
R/W-0
ICOV
ICTSEL<2:0>
R/HC/HS-0
HS = Set by Hardware
U = Unimplemented bit, read as ‘0’
ICBNE
R/W-0
R/W-0
R/W-0
 2009-2011 Microchip Technology Inc.
ICM<2:0>
R/W-0
‘0’ = Bit is cleared
U-0
R/W-0
U-0
bit 8
bit 0

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