CY8C3665PVI-008 Cypress Semiconductor Corp, CY8C3665PVI-008 Datasheet - Page 51

• Manufacturer Part Number: CY8C3665PVI-008
• Description: CY8C3665PVI-008
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C36xxr

Specifications of CY8C3665PVI-008

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 67MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, UART/USART
• Peripherals: CapSense, DMA, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Data Converters: A/D 2x12b, D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: SSOP
• Screening Level: Industrial
• Pin Count: 48
• Mounting: Surface Mount
• Rad Hardened: No
• Processor Series: CY8C36
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 67 MHz
• Number Of Programmable I/os: 28 to 72
• Number Of Timers: 4
• Operating Supply Voltage: 0.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 25
• Eeprom Memory Size: 1KB
• Ram Memory Size: 4KB
• Cpu Speed: 67MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The PSoC Creator software program provides a user friendly
interface to configure the analog connections between the GPIO
and various analog resources and connections from one analog
resource to another. PSoC Creator also provides component
libraries that allow you to configure the various analog blocks to
perform application specific functions (PGA, transimpedance
amplifier, voltage DAC, current DAC, and so on). The tool also
generates API interface libraries that allow you to write firmware
that allows the communication between the analog peripheral
and CPU/Memory.
8.1 Analog Routing
The CY8C36 family of devices has a flexible analog routing
architecture that provides the capability to connect GPIOs and
different analog blocks, and also route signals between different
analog blocks. One of the strong points of this flexible routing
architecture is that it allows dynamic routing of input and output
connections to the different analog blocks.
For information on how to make pin selections for optimal analog
routing, refer to the application note,
PSoC® 5 - Pin Selection for Analog Designs.
8.1.1 Features
Document Number: 001-53413 Rev. *K
Flexible, configurable analog routing architecture
16 analog globals (AG) and two analog mux buses
(AMUXBUS) to connect GPIOs and the analog blocks
Each GPIO is connected to one analog global and one analog
mux bus
GPIO
Port
A
N
A
L
O
G
R
O
U
T
N
G
I
AN58304 - PSoC® 3 and
Figure 8-1. Analog Subsystem Block Diagram
DAC
DAC
Array
DSI
CMP
SC/CT Block
SC/CT Block
CapSense Subsystem
CMP
Comparators
Distribution
Interface
Analog
Clock
CMP
SC/CT Block
SC/CT Block
8.1.2 Functional Description
Analog globals (AGs) and analog mux buses (AMUXBUS)
provide analog connectivity between GPIOs and the various
analog blocks. There are 16 AGs in the CY8C36 family. The
analog routing architecture is divided into four quadrants as
shown in
(AGL[0..3], AGL[4..7], AGR[0..3], AGR[4..7]). Each GPIO is
connected to the corresponding AG through an analog switch.
The analog mux bus is a shared routing resource that connects
to every GPIO through an analog switch. There are two
AMUXBUS routes in CY8C36, one in the left half (AMUXBUSL)
and one in the right half (AMUXBUSR), as shown in
Eight analog local buses (abus) to route signals between the
different analog blocks
Multiplexers and switches for input and output selection of the
analog blocks
Registers
Config &
Reference
Status
Precision
CMP
Decimator
Figure
PHUB
8-2. Each quadrant has four analog globals
DAC
DAC
PSoC
CPU
A
N
A
L
O
G
R
O
U
T
N
G
I
®
3: CY8C36 Family
GPIO
Port
Data Sheet
Page 51 of 125
Figure
8-2.
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