AD9779A-EBZ Analog Devices Inc, AD9779A-EBZ Datasheet - Page 50

Dual 16B, 1.0 GSPS TxDAC

AD9779A-EBZ

Manufacturer Part Number
AD9779A-EBZ
Description
Dual 16B, 1.0 GSPS TxDAC
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet

Specifications of AD9779A-EBZ

Design Resources
Interfacing ADL5370 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0016) Interfacing ADL5371 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0017) Interfacing ADL5372 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0018) Interfacing ADL5373 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0019) Interfacing ADL5374 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0020) Interfacing ADL5375 to AD9779A Dual-Channel, 1 GSPS High Speed DAC (CN0021)
Number Of Dac's
2
Number Of Bits
16
Outputs And Type
2, Differential
Sampling Rate (per Second)
1G
Data Interface
Serial
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD9779A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Settling Time
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9776A/AD9778A/AD9779A
The evaluation board comes with software that allows the user
to program the SPI port. Via the SPI port, the devices can be
programmed into any of its various operating modes. When
first operating the evaluation board, it is useful to start with a
simple configuration, that is, a configuration in which the SPI
port settings are as close as possible to the default settings. The
default software window is shown in Figure 103. The arrows
indicate which settings need to be changed for an easy first time
evaluation. Note that this implies that the PLL is not being used
and that the clock being used is at the speed of the DAC output
sample rate.
The default settings for the evaluation board allow the user
to view the differential outputs through a transformer that
converts the DAC output signal to a single-ended signal. On
1. SET INTERPOLATION RATE
2. SET INTERPOLATION FILTER MODE
Figure 103. SPI Port Software Window
3. SET INPUT DATA FORMAT
Rev. A | Page 50 of 60
4. SET DATACLK POLARITY TO MATCH INPUT TIMING
the evaluation board, these transformers are designated T1A,
T2A, T3A, and T4A. There are also four common-mode
transformers on the board that are designated T1B, T2B, T3B,
and T4B. The recommended operating setup places the trans-
former and common-mode transformer in series. A pair
of transformers and common-mode transformers are installed
on each DAC output, so that the pairs can be set up in either
order. As an example, for the frequency range of dc to 30 MHz,
it is recommended that the transformer be placed right after
the DAC. Above DAC output frequencies of 30 MHz, it is
recommended that the common-mode transformer be placed
right after the DAC outputs, followed by the transformer.

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