AD7193BCPZ Analog Devices Inc, AD7193BCPZ Datasheet - Page 35

• Manufacturer Part Number: AD7193BCPZ
• Description: 4ch VeryLow Noise 24Bit SD ADC With PGA
• Manufacturer: Analog Devices Inc

Specifications of AD7193BCPZ

• Number Of Bits: 24
• Sampling Rate (per Second): 4.8k
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 32-WFQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DOUT/RDY
Continuous Conversion Mode
Continuous conversion is the default power-up mode. The
AD7193 converts continuously, and the RDY bit in the status
register goes low each time a conversion is complete. If CS is
low, the DOUT/ RDY line also goes low when a conversion is
completed. To read a conversion, the user writes to the commu-
nications register, indicating that the next operation is a read of
the data register. When the data-word has been read from the
data register, DOUT/ RDY goes high. The user can read this
register additional times, if required. However, the user must
ensure that the data register is not being accessed at the completion
of the next conversion or else the new conversion word is lost.
SCLK
DIN
CS
0x58
Figure 26. Continuous Conversion
Rev. B | Page 35 of 56
DATA
When several channels are enabled, the ADC continuously
loops through the enabled channels, performing one conversion
on each channel per loop. The data register is updated as soon
as each conversion is available. The DOUT/ RDY pin pulses low
each time a conversion is available. The user can then read the
conversion while the ADC converts on the next enabled channel.
If the DAT_STA bit in the mode register is set to 1, the contents
of the status register are output along with the conversion each
time that the data read is performed. The status register indicates
the channel to which the conversion corresponds.
0x58
DATA
AD7193