5M80ZT100C5N Altera, 5M80ZT100C5N Datasheet - Page 69

• Manufacturer Part Number: 5M80ZT100C5N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX Vr

Specifications of 5M80ZT100C5N

• Cpld Type: FLASH
• No. Of Macrocells: 64
• No. Of I/o's: 79
• Propagation Delay: 7.5ns
• Global Clock Setup Time: 4.6ns
• Frequency: 118.3MHz
• Supply Voltage Range: 1.71V To 1.89V
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 80
• Number Of Macrocells: 64
• Number Of Gates: -
• Number Of I /o: 79
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 3: DC and Switching Characteristics for MAX V Devices
Timing Model and Specifications
Table 3–39. Emulated LVDS Output Timing Specifications for MAX V Devices
May 2011 Altera Corporation
Data rate (1),
t
Total jitter
t
t
Notes to
(1) The performance of the LVDS_E_3R transmitter system is limited by the lower of the two—the maximum data rate supported by LVDS_E_3R
(2) For the input clock pin to achieve 304 Mbps, use I/O standard with V
(3) This specification is based on external clean clock source.
DUTY
RISE
FALL
I/O buffer or 2x (F
the Quartus II timing analysis of the complete design.
Parameter
Table
LVDS and RSDS Output Timing Specifications
(3)
3–39:
(2)
MAX
of the ALTLVDS_TX instance). The actual performance of your LVDS_E_3R transmitter system must be attained through
Table 3–39
lists the emulated LVDS output timing specifications for MAX V devices.
Mode
10
9
8
7
6
5
4
3
2
1
—
—
—
—
CCIO
of 2.5 V and above.
Min
—
—
—
—
—
—
—
—
—
—
45
—
—
—
5M240Z/ 5M570Z/5M1270Z/
5M40Z/ 5M80Z/ 5M160Z/
C4, C5, I5
5M2210Z
Max
304
304
304
304
304
304
304
304
304
304
450
450
0.2
55
MAX V Device Handbook
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Unit
UI
ps
ps
%
3–27