LFE2-50E-H-EV Lattice, LFE2-50E-H-EV Datasheet - Page 94

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LFE2-50E-H-EV

Manufacturer Part Number
LFE2-50E-H-EV
Description
MCU, MPU & DSP Development Tools LatticeECP2 Eval Brd - Advanced
Manufacturer
Lattice
Datasheet

Specifications of LFE2-50E-H-EV

Processor To Be Evaluated
LatticeECP2 FPGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
Table 3-13. Periodic Receiver Jitter Tolerance Specification
Periodic
1. Values are measured with PRBS 2
2. Jitter specification is limited by measurement equipment capability.
Description
3.125 Gbps 600 mV differential eye
2.5 Gbps
1.25 Gbps
250 Mbps
Frequency
2
600 mV differential eye
600 mV differential eye
600 mV differential eye
7
-1, all channels operating.
Condition
3-42
Min.
1
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
Typ.
Max.
0.22
0.08
0.20
0.20
UI, p-p
UI, p-p
UI, p-p
UI, p-p
Units

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