LFE2-50E-H-EV Lattice, LFE2-50E-H-EV Datasheet - Page 141

• Manufacturer Part Number: LFE2-50E-H-EV
• Description: MCU, MPU & DSP Development Tools LatticeECP2 Eval Brd - Advanced
• Manufacturer: Lattice

Specifications of LFE2-50E-H-EV

• Processor To Be Evaluated: LatticeECP2 FPGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
LFE2-6E/SE and LFE2-12E/SE Logic Signal Connections: 256 fpBGA (Cont.)
Number
* Supports true LVDS. Other differential signals must be emulated with external resistors.
** These dedicated input pins can be used for GPLLs or GDLLs within the respective quadrant.
Note: VCCIO and GND pads are used to determine the average DC current drawn by I/Os between GND/VCCIO connections, or between the
last GND/VCCIO in an I/O bank and the end of an I/O bank. The substrate pads listed in the Pin Table do not necessarily have a one to one
connection with a package ball or pin.
Ball
R12
T16
R5
T1
Function
Ball/Pad
GND
GND
GND
GND
Bank
LFE2-6E/SE
-
-
-
-
Dual Function
Differential
4-38
Function
Ball/Pad
GND
GND
GND
GND
LatticeECP2/M Family Data Sheet
Bank
-
-
-
-
LFE2-12E/SE
Dual Function
Pinout Information
Differential