MA160014 Microchip Technology, MA160014 Datasheet - Page 391

MOD PLUG-IN 44PIN PIC18LF45K22

MA160014

Manufacturer Part Number
MA160014
Description
MOD PLUG-IN 44PIN PIC18LF45K22
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of MA160014

Accessory Type
Plug-In Module (PIM) - PIC18LF45K10
Product
Microcontroller Modules
Data Bus Width
8 bit
Core Processor
PIC18LF45K22
Interface Type
I2C, SPI
Operating Supply Voltage
1.8 V to 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
PICDEM PIC18 Explorer, DM183032
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MA160014
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
MA160014
Manufacturer:
MICROCHIP
Quantity:
12 000
LFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2010 Microchip Technology Inc.
Q Cycle Activity:
After Instruction
Decode
Decode
FSR2H
FSR2L
Q1
Read literal
Read literal
Load FSR
LFSR f, k
0  f  2
0  k  4095
k  FSRf
None
File Select Register pointed to by ‘f’.
2
2
The 12-bit literal ‘k’ is loaded into the
‘k’ MSB
‘k’ LSB
LFSR 2, 3ABh
1110
1111
Q2
=
=
03h
ABh
1110
0000
Process
Process
Data
Data
Q3
k
00ff
7
kkk
‘k’ to FSRfL
Write literal
literal ‘k’
MSB to
FSRfH
Write
k
Q4
kkkk
11
kkk
Preliminary
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
PIC18(L)F2X/4XK22
Before Instruction
After Instruction
Decode
REG
W
REG
W
Q1
register ‘f’
Move f
MOVF
0  f  255
d  [0,1]
a  [0,1]
f  dest
N, Z
The contents of register ‘f’ are moved to
a destination dependent upon the
status of ‘d’. If ‘d’ is ‘0’, the result is
placed in W. If ‘d’ is ‘1’, the result is
placed back in register ‘f’ (default).
Location ‘f’ can be anywhere in the
256-byte bank.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f 95 (5Fh). See
Section 25.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode”
1
1
MOVF
Read
0101
Q2
=
=
=
=
22h
FFh
22h
22h
f {,d {,a}}
REG, 0, 0
00da
Process
Data
Q3
DS41412D-page 391
ffff
for details.
Write W
Q4
ffff

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