MA160014 Microchip Technology, MA160014 Datasheet - Page 102

• Manufacturer Part Number: MA160014
• Description: MOD PLUG-IN 44PIN PIC18LF45K22
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of MA160014

• Accessory Type: Plug-In Module (PIM) - PIC18LF45K10
• Product: Microcontroller Modules
• Data Bus Width: 8 bit
• Core Processor: PIC18LF45K22
• Interface Type: I2C, SPI
• Operating Supply Voltage: 1.8 V to 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PICDEM PIC18 Explorer, DM183032
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18(L)F2X/4XK22
EXAMPLE 6-3:
DS41412D-page 102
READ_BLOCK
MODIFY_WORD
ERASE_BLOCK
Required
Sequence
WRITE_BUFFER_BACK
WRITE_BYTE_TO_HREGS
WRITING TO FLASH PROGRAM MEMORY
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
TBLRD*+
MOVF
MOVWF
DECFSZ
BRA
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BCF
BSF
BSF
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
TBLRD*-
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVF
MOVWF
TBLWT+*
D'64’
COUNTER
BUFFER_ADDR_HIGH
FSR0H
BUFFER_ADDR_LOW
FSR0L
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
TABLAT, W
POSTINC0
COUNTER
READ_BLOCK
BUFFER_ADDR_HIGH
FSR0H
BUFFER_ADDR_LOW
FSR0L
NEW_DATA_LOW
POSTINC0
NEW_DATA_HIGH
INDF0
CODE_ADDR_UPPER
TBLPTRU
CODE_ADDR_HIGH
TBLPTRH
CODE_ADDR_LOW
TBLPTRL
EECON1, EEPGD
EECON1, CFGS
EECON1, WREN
EECON1, FREE
INTCON, GIE
55h
EECON2
0AAh
EECON2
EECON1, WR
INTCON, GIE
BUFFER_ADDR_HIGH
FSR0H
BUFFER_ADDR_LOW
FSR0L
BlockSize
COUNTER
D’64’/BlockSize
COUNTER2
POSTINC0, W
TABLAT
Preliminary
; number of bytes in erase block
; point to buffer
; Load TBLPTR with the base
; address of the memory block
; read into TABLAT, and inc
; get data
; store data
; done?
; repeat
; point to buffer
; update buffer word
; load TBLPTR with the base
; address of the memory block
; point to Flash program memory
; access Flash program memory
; enable write to memory
; enable Erase operation
; disable interrupts
; write 55h
; write 0AAh
; start erase (CPU stall)
; re-enable interrupts
; dummy read decrement
; point to buffer
; number of bytes in holding register
; number of write blocks in 64 bytes
; get low byte of buffer data
; present data to table latch
; write data, perform a short write
; to internal TBLWT holding register.
 2010 Microchip Technology Inc.