CDB42L55 Cirrus Logic Inc, CDB42L55 Datasheet - Page 65

• Manufacturer Part Number: CDB42L55
• Description: Eval Bd Ultra Low Power Stereo Codec
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42L55

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42L55
• Primary Attributes: 2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
• Secondary Attributes: GUI, USB, RS232, I2C Interfaces, USB or External or Battery Power Supply
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1506; CDB-42L55

DS773F1
6.32.2 Noise Gate Enable
6.32.3 Noise Gate Threshold and Boost
6.32.4 Noise Gate Delay Timing
6.33
6.33.1 ALCx Soft Ramp Disable
6.33.2 ALCx Zero Cross Disable
ALCBSRDIS
7
ALC and Limiter Soft Ramp, Zero Cross Disables (Address 28h)
Configures the noise gate.
THRESH sets the threshold level of the noise gate. Input signals below the threshold level will be attenu-
ated to -96 dB. NG_BOOST configures a +30 dB boost to the threshold settings.
Sets the delay time before the noise gate attacks.
Note:
Soft Ramp” on page
Configures an override of the analog soft ramp setting.
Configures an override of the analog zero cross setting.
NG
0
1
THRESH[2:0]
000
001
010
011
100
101
110
111
NGDELAY[1:0]
00
01
10
11
ALCxSRDIS
0
1
ALCxZCDIS
0
1
ALCBZCDIS
The Noise Gate attack rate is a function of the sampling frequency, Fs, and the DIGSFT
6
Noise Gate Status
Disabled
Enabled
Minimum Setting (NG_BOOST = ‘0’b)
-64 dB
-67 dB
-70 dB
-73 dB
-76 dB
-82 dB
Reserved
Reserved
Delay Setting
50 ms
100 ms
150 ms
200 ms
ALC Soft Ramp Disable
OFF; ALC Attack Rate is dictated by the DIGSFT
ON; ALC volume changes take effect in one step, regardless of the DIGSFT setting.
ALC Zero Cross Disable
OFF; ALC Attack Rate is dictated by the ANLGZC
ON; ALC volume changes take effect at any time, regardless of the ANLGZC setting.
ALCASRDIS
46) setting unless the disable bit
5
ALCAZCDIS
4
LIMSRDIS
(“ALCx Soft Ramp Disable” on page
3
(“Digital Soft Ramp” on page
(“Analog Zero Cross” on page
Minimum Setting (NG_BOOST = ‘1’b)
-34 dB
-36 dB
-40 dB
-43 dB
-46 dB
-52 dB
-58 dB
-64 dB
2
Reserved
46) setting
46) setting
1
65) is enabled.
CS42L55
Reserved
(“Digital
0
65