CDB42L55 Cirrus Logic Inc, CDB42L55 Datasheet - Page 32

Eval Bd Ultra Low Power Stereo Codec

CDB42L55

Manufacturer Part Number
CDB42L55
Description
Eval Bd Ultra Low Power Stereo Codec
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42L55

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L55
Primary Attributes
2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
Secondary Attributes
GUI, USB, RS232, I2C Interfaces, USB or External or Battery Power Supply
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1506
CDB-42L55
32
4.7
Limiter
When enabled, the limiter monitors the digital input signal before the DAC modulators, detects when levels
exceed the maximum threshold settings and lowers the master volume at a programmable attack rate below
the maximum threshold. When the input signal level falls below the maximum threshold, the AOUT volume
returns to its original level set in the Master Volume Control register at a programmable release rate. Attack
and release rates are affected by the DAC soft ramp settings and sample rate, Fs. Limiter soft ramp depen-
dency may be independently enabled/disabled using the LIMSRDIS.
BPVOL[4:0]
Referenced Control
MSTxVOL[7:0].....................
PMIXxVOL[6:0]....................
OFFTIME[2:0]......................
ONTIME[3:0] .......................
FREQ[3:0] ...........................
BEEP[1:0]............................
BPVOL[4:0] .........................
Notes:
1. Recommended settings: Best limiting performance may be realized with the fastest attack and
2. The Limiter maintains the output signal between the CUSH and MAX thresholds. As the digital input
Referenced Control
Limiter Rates .......................
Limiter Thresholds
LIMSRDIS ...........................
Master Volume Control........
slowest release setting with soft ramp enabled in the control registers. The CUSH bits allow the user
to set a threshold slightly below the maximum threshold for hysteresis control - this cushions the
sound as the limiter attacks and releases.
signal level changes, the level-controlled output may not always be the same but will always fall within
the thresholds.
BEEP[1:0] =
'11'
BEEP[1:0] =
'10'
BEEP[1:0] =
'01'
FREQ[3:0]
CONTINUOUS BEEP: Beep turns on at a configurable frequency (FREQ) and volume (BPVOL) and remains on
until REPEAT is cleared.
MULTI-BEEP: Beep turns on at a configurable frequency (FREQ)
and volume (BPVOL) for the duration of ONTIME and turns off for
the duration of OFFTIME. On and off cycles are repeated until
REPEAT is cleared.
SINGLE-BEEP: Beep turns on at a
configurable frequency (FREQ) and
volume (BPVOL) for the duration of
ONTIME. BEEP must be cleared
and set for additional beeps.
ONTIME[3:0]
Register Location
“Master Volume Control: MSTA (Address 18h) & MSTB (Address 19h)” on page 57
“PCMx Mixer Volume: PCMA (Address 12h) & PCMB (Address 13h)” on page 52
“Beep Off Time” on page 54
“Beep On Time” on page 54
“Beep Frequency” on page 53
“Beep Configuration” on page 55
“Beep Volume” on page 55
Register Location
“Limiter Release Rate” on page
“Limiter Maximum Threshold” on page
“Limiter Soft Ramp Disable” on page 66
“Master Volume Control: MSTA (Address 18h) & MSTB (Address 19h)” on page 57
Figure 18. Beep Configuration Options
OFFTIME[2:0]
62,
“Limiter Attack Rate” on page 62
60,
“Limiter Cushion Threshold” on page 61
...
CS42L55
DS773F1

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