IPR-PCIE/4 Altera, IPR-PCIE/4 Datasheet - Page 227
IPR-PCIE/4
Manufacturer Part Number
IPR-PCIE/4
Description
IP CORE Renewal Of IP-PCIE/4
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-PCIE/4
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Express Compiler, x4 Link Width
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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Content Without
Data Payload
Altera Corporation
December 2006
Tables B–2
packets without a data payload. When these headers are transferred to
and from the MegaCore function as tx_desc and rx_desc, the
mapping shown in
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Byte 10
Byte 11
Byte 12
Byte 13
Byte 14
Byte 15
Table B–1. Header Mapping
PCI Express Compiler Version 6.1
through
Header Byte
Table B–1
B–9
show the header format for transaction layer
Transaction Layer Packet
is used
.
127:120
119:112
111:104
103:96
95:88
87:80
79:72
71:64
63:56
55:48
47:40
39:32
31:24
23:16
15:8
7:0
Header Formats
tx_desc/rx_desc Bits
Appendix B.
B–1
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