IPR-PCIE/4 Altera, IPR-PCIE/4 Datasheet - Page 106
IPR-PCIE/4
Manufacturer Part Number
IPR-PCIE/4
Description
IP CORE Renewal Of IP-PCIE/4
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-PCIE/4
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Express Compiler, x4 Link Width
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
- Current page: 106 of 256
- Download datasheet (2Mb)
Signals
Figure 3–25. Retried Transaction & Masked Non-Posted Transaction Waveform
3–68
PCI Express Compiler User Guide
Descriptor
Signals
Signals
Data
rx_desc[135:128]
rx_desc[127:64]
rx_data[63:32]
rx_desc[63:0]
rx_data[31:0]
rx_be[7:0]
rx_mask
rx_abort
rx_retry
rx_ack
rx_req
rx_ws
Transaction Aborted
In
layer. Having determined it will never be able to accept the transaction
layer packet, the application layer discards it by asserting rx_abort. An
alternative design might implement logic whereby all transaction layer
packets are accepted and, after verification, potentially rejected by the
application layer. An advantage of asserting rx_abort is that
transaction layer packets with data payloads can be discarded in 1 clock
cycle.
Having aborted the first transaction layer packet, the MegaCore function
can transmit the second, a 3 DWORD completion in this case. The
MegaCore function does not treat the aborted transaction layer packet as
an error and updates flow control credits as if the transaction were
acknowledged. In this case, the application layer is responsible for
generating and transmitting a completion with completer abort status
and to signal a completer abort event to the MegaCore function
configuration space through assertion of cpl_err.
rx_dfr
rx_dv
Figure
X
X
X
1
PCI Express Compiler Version 6.1
3–26, a memory read of 16 DWORDS is sent to the application
2
MEMRD 4DW
3
X
00h
Valid
Valid
4
X
X
X
5
MEMWR 1DW
6
Valid
Valid
Clock Cycles
7
DW 0
F0h
X
8
X
X
X
9
10
MEMRD 4DW
11
Valid
Valid
00h
X
12
Altera Corporation
13
X
X
X
December 2006
14
Related parts for IPR-PCIE/4
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
IP CORE Renewal Of IP-PCI/MT32
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCI/MT64
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCI/T32
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCI/T64
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCIE/1
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-PCIE/8
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP NIOS II MEGACORE RENEW
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE Renewal Of IP-XAUIPCS
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet: