PIC16F689-E/ML Microchip Technology, PIC16F689-E/ML Datasheet - Page 72

• Manufacturer Part Number: PIC16F689-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F689-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 18
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F631/677/685/687/689/690
REGISTER 4-8:
REGISTER 4-9:
REGISTER 4-10:
DS41262E-page 70
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
Note 1: Global RABPU bit of the OPTION register must be enabled for individual pull-ups to be enabled.
TRISB7
WPUB7
IOCB7
R/W-1
R/W-1
R/W-0
2: The weak pull-up device is automatically disabled if the pin is in Output mode (TRISB<7:4> = 0).
TRISB<7:4>: PORTB Tri-State Control bit
1 = PORTB pin configured as an input (tri-stated)
0 = PORTB pin configured as an output
Unimplemented: Read as ‘0’
WPUB<7:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
IOCB<7:4>: Interrupt-on-Change PORTB Control bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
Unimplemented: Read as ‘0’
TRISB6
WPUB6
IOCB6
R/W-1
R/W-1
R/W-0
TRISB: PORTB TRI-STATE REGISTER
WPUB: WEAK PULL-UP PORTB REGISTER
IOCB: INTERRUPT-ON-CHANGE PORTB REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TRISB5
WPUB5
IOCB5
R/W-1
R/W-1
R/W-0
TRISB4
WPUB4
IOCB4
R/W-1
R/W-1
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
U-0
—
—
—
U-0
U-0
U-0
—
—
—
© 2008 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
U-0
U-0
U-0
—
—
—
U-0
U-0
U-0
—
—
—
bit 0
bit 0
bit 0