PIC16F689-E/ML Microchip Technology, PIC16F689-E/ML Datasheet - Page 105

• Manufacturer Part Number: PIC16F689-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F689-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 18
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 8-4:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
Note 1:
R/W-0
SR1
2:
(2)
The CxOUT bit in the CMxCON0 register will always reflect the actual comparator output (not the level on
the pin), regardless of the SR latch operation.
To enable an SR latch output to the pin, the appropriate CxOE and TRIS bits must be properly configured.
SR1: SR Latch Configuration bit
1 =
0 =
SR0: SR Latch Configuration bits
1 =
0 =
C1SEN: C1 Set Enable bit
1 = C1 comparator output sets SR latch
0 = C1 comparator output has no effect on SR latch
C2REN: C2 Reset Enable bit
1 = C2 comparator output resets SR latch
0 = C2 comparator output has no effect on SR latch
PULSS: Pulse the SET Input of the SR Latch bit
1 = Triggers pulse generator to set SR latch. Bit is immediately reset by hardware.
0 = Does not trigger pulse generator
PULSR: Pulse the Reset Input of the SR Latch bit
1 = Triggers pulse generator to reset SR latch. Bit is immediately reset by hardware.
0 = Does not trigger pulse generator
Unimplemented: Read as ‘0’
SR0
R/W-0
C2OUT pin is the latch Q output
C2OUT pin is the C2 comparator output
C1OUT pin is the latch Q output
C1OUT pin is the Comparator C1 output
SRCON: SR LATCH CONTROL REGISTER
(2)
W = Writable bit
‘1’ = Bit is set
S = Bit is set only
C1SEN
R/W-0
PIC16F631/677/685/687/689/690
C2REN
(2)
R/W-0
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PULSS
R/S-0
PULSR
R/S-0
x = Bit is unknown
U-0
—
DS41262E-page 103
U-0
—
bit 0