DSPIC30F5011-20E/PT Microchip Technology, DSPIC30F5011-20E/PT Datasheet - Page 211

• Manufacturer Part Number: DSPIC30F5011-20E/PT
• Description: IC,DSP,16-BIT,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5011-20E/PT

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F5011-20E/PTG; DSPIC30F501120EPT; DSPIC30F501120EPT

INDEX
Numerics
12-bit Analog-to-Digital Converter (A/D) Module .............. 127
A
A/D .................................................................................... 127
AC Characteristics ............................................................ 173
AC Temperature and Voltage Specifications .................... 173
AC-Link Mode Operation .................................................. 124
ADC
ADC Conversion Speeds .................................................. 130
Address Generator Units .................................................... 41
Alternate Vector Table ........................................................ 39
Analog-to-Digital Converter. See A/D.
Assembler
Automatic Clock Stretch...................................................... 94
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 22
Bit-Reversed Addressing .................................................... 44
Block Diagrams
© 2011 Microchip Technology Inc.
Aborting a Conversion .............................................. 129
ADCHS Register ....................................................... 127
ADCON1 Register..................................................... 127
ADCON2 Register..................................................... 127
ADCON3 Register..................................................... 127
ADCSSL Register ..................................................... 127
ADPCFG Register..................................................... 127
Configuring Analog Port Pins.............................. 58, 134
Connection Considerations....................................... 134
Conversion Operation ............................................... 128
Effects of a Reset...................................................... 133
Operation During CPU Idle Mode ............................. 133
Operation During CPU Sleep Mode.......................... 133
Output Formats ......................................................... 133
Power-down Modes .................................................. 133
Programming the Sample Trigger............................. 129
Register Map............................................................. 135
Result Buffer ............................................................. 128
Sampling Requirements............................................ 132
Selecting the Conversion Sequence......................... 128
Internal LPRC Accuracy............................................ 176
Load Conditions ........................................................ 173
16-bit Mode ............................................................... 124
20-bit Mode ............................................................... 125
Selecting the Conversion Clock ................................ 129
MPASM Assembler................................................... 160
During 10-bit Addressing (STREN = 1)....................... 94
During 7-bit Addressing (STREN = 1)......................... 94
Receive Mode ............................................................. 94
Transmit Mode ............................................................ 94
Requirements............................................................ 180
Timing Characteristics .............................................. 180
Example ...................................................................... 44
Implementation ........................................................... 44
Modifier Values Table ................................................. 45
Sequence Table (16-Entry)......................................... 45
12-bit A/D Functional ................................................ 127
16-bit Timer1 Module .................................................. 63
16-bit Timer2............................................................... 69
16-bit Timer3............................................................... 69
16-bit Timer4............................................................... 74
16-bit Timer5............................................................... 74
BOR Characteristics ......................................................... 172
BOR. See Brown-out Reset.
Brown-out Reset
C
C Compilers
CAN Module ..................................................................... 107
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 137
Control Registers ................................................................ 48
Core Architecture
CPU Architecture Overview ................................................ 15
Customer Change Notification Service............................. 215
Customer Notification Service .......................................... 215
Customer Support............................................................. 215
D
Data Accumulators and Adder/Subtractor .......................... 20
dsPIC30F5011/5013
32-bit Timer2/3 ........................................................... 68
32-bit Timer4/5 ........................................................... 73
CAN Buffers and Protocol Engine ............................ 108
DCI Module............................................................... 118
Dedicated Port Structure ............................................ 57
DSP Engine ................................................................ 19
dsPIC30F5011............................................................ 10
dsPIC30F5013............................................................ 11
External Power-on Reset Circuit .............................. 145
I
Input Capture Mode.................................................... 77
Oscillator System...................................................... 139
Output Compare Mode ............................................... 81
Reset System ........................................................... 143
Shared Port Structure................................................. 58
SPI.............................................................................. 88
SPI Master/Slave Connection..................................... 88
UART Receiver......................................................... 100
UART Transmitter....................................................... 99
Characteristics.......................................................... 171
Timing Requirements ............................................... 179
MPLAB C18.............................................................. 160
Baud Rate Setting .................................................... 112
CAN1 Register Map.................................................. 114
Frame Types ............................................................ 107
I/O Timing Characteristics ........................................ 198
I/O Timing Requirements.......................................... 198
Message Reception.................................................. 110
Message Transmission............................................. 111
Modes of Operation .................................................. 109
Overview................................................................... 107
Characteristics.......................................................... 177
Requirements ........................................................... 177
Data EEPROM Block Erase ....................................... 54
Data EEPROM Block Write ........................................ 56
Data EEPROM Read.................................................. 53
Data EEPROM Word Erase ....................................... 54
Data EEPROM Word Write ........................................ 55
Erasing a Row of Program Memory ........................... 49
Initiating a Programming Sequence ........................... 50
Loading Write Latches................................................ 50
NVMADR .................................................................... 48
NVMADRU ................................................................. 48
NVMCON.................................................................... 48
NVMKEY .................................................................... 48
Overview..................................................................... 15
Data Space Write Saturation ...................................... 22
2
C .............................................................................. 92
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