LAN9215-MT SMSC, LAN9215-MT Datasheet - Page 63
![CONTROLLER, ENET, NON-PCI, 100TQFP](/photos/19/0/190054/42334689_sml.jpg)
LAN9215-MT
Manufacturer Part Number
LAN9215-MT
Description
CONTROLLER, ENET, NON-PCI, 100TQFP
Manufacturer
SMSC
Specifications of LAN9215-MT
Data Rate
100Mbps
No. Of Ports
2
Ethernet Type
IEEE 802.3 / 802.3u
Supply Current
40mA
Supply Voltage Range
2.97V To 3.63V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
TQFP
Interface Type
HBI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Company
Part Number
Manufacturer
Quantity
Price
Company:
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LAN9215-MT
Manufacturer:
BROADCOM
Quantity:
450
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Part Number:
LAN9215-MT
Manufacturer:
Standard
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Company:
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SMSC
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Highly Efficient 10/100 Ethernet Controller with HP Auto-MDIX
SMSC LAN9215
4.2.2
4.2.3
4.2.4
4.2.5
GROUP
CODE
01000
01100
10000
Scrambling
Repeated data patterns (especially the IDLE code-group) can have power spectral densities with large
narrow-band peaks. Scrambling the data helps eliminate these peaks and spread the signal power
more uniformly over the entire channel bandwidth. This uniform spectral density is required by FCC
regulations to prevent excessive EMI from being radiated by the physical wiring.
The scrambler also performs the Parallel In Serial Out conversion (PISO) of the data.
NRZI and MLT3 Encoding
The scrambler block passes the 5-bit wide parallel data to the NRZI converter where it becomes a
serial 125MHz NRZI data stream. The NRZI is encoded to MLT-3. MLT3 is a tri-level code where a
change in the logic level represents a code bit “1” and the logic output remaining at the same level
represents a code bit “0”.
100M Transmit Driver
The MLT3 data is then passed to the analog transmitter, which launches the differential MLT-3 signal,
on outputs TXP and TXN, to the twisted pair media via a 1:1 ratio isolation transformer. The 10Base-
T and 100Base-TX signals pass through the same transformer so that common “magnetics” can be
used for both. The transmitter drives into the 100Ω impedance of the CAT-5 cable. Cable termination
and impedance matching require external components.
100M Phase Lock Loop (PLL)
The 100M PLL locks onto reference clock and generates the 125MHz clock used to drive the 125 MHz
logic and the 100Base-Tx Transmitter.
SYM
V
V
V
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
INVALID, RX_ER if during RX_DV
Table 4.1 4B/5B Code Table (continued)
INTERPRETATION
RECEIVER
DATASHEET
63
INVALID
INVALID
INVALID
INTERPRETATION
TRANSMITTER
Revision 1.2 (03-29-06)