LAN9215-MT SMSC, LAN9215-MT Datasheet - Page 10

• Manufacturer Part Number: LAN9215-MT
• Description: CONTROLLER, ENET, NON-PCI, 100TQFP
• Manufacturer: SMSC

Specifications of LAN9215-MT

• Data Rate: 100Mbps
• No. Of Ports: 2
• Ethernet Type: IEEE 802.3 / 802.3u
• Supply Current: 40mA
• Supply Voltage Range: 2.97V To 3.63V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: TQFP
• Interface Type: HBI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.2 (03-29-06)
1.2
M ic r o p r o c e s s o r /
M ic r o c o n t r o lle r
E m b e d d e d
S y s t e m M e m o r y
The SMSC LAN9215 integrated 10/100 MAC/PHY controller is a peripheral chip that performs the
function of translating parallel data from a host controller into Ethernet packets. The LAN9215 Ethernet
MAC/PHY controller is designed and optimized to function in an embedded environment. All
communication is performed with programmed I/O transactions using the simple SRAM-like host
interface bus.
The diagram shown above, describes a typical system configuration of the LAN9215in a typical
embedded environment.
The LAN9215 is a general purpose, platform independent, Ethernet controller. The LAN9215 consists
of four major functional blocks. The four blocks are:
The LAN9215 is driver-, register-, and footprint-compatible with previous generation LAN9115 devices.
Drivers written for these products will work with the LAN9215. However, in order to support HP Auto-
MDIX, other components such as the magnetics and the passive components around the magnetics
need to change, and supporting these changes does require a minor PCB change. Customers also
have the option of designing the PCB such that it will accomodate the LAN9215 or the LAN9115. A
reference design for the LAN9215 will be available on SMSC’s website, along with an application note
showing how to make new designs backwards compatible with the first generation LAN9115 devices.
Compatibility with First-generation LAN9118 Family Devices
10/100 Ethernet PHY
10/100 Ethernet MAC
RX/TX FIFOs
Host Bus Interface (HBI)
S y s te m B u s
Figure 1.1 System Block Diagram
DATASHEET
S y s t e m M e m o r y
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S y s t e m
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E E P R O M
Highly Efficient 10/100 Ethernet Controller with HP Auto-MDIX
M II
M a g n e t i c s
L E D S /G P IO
E x t e r n a l
O p ti o n a l
P H Y
M a g n e t i c s
O p tio n a l
E t h e r n e t
SMSC LAN9215
Datasheet