LAN9215-MT SMSC, LAN9215-MT Datasheet - Page 47

CONTROLLER, ENET, NON-PCI, 100TQFP

LAN9215-MT

Manufacturer Part Number
LAN9215-MT
Description
CONTROLLER, ENET, NON-PCI, 100TQFP
Manufacturer
SMSC
Datasheets

Specifications of LAN9215-MT

Data Rate
100Mbps
No. Of Ports
2
Ethernet Type
IEEE 802.3 / 802.3u
Supply Current
40mA
Supply Voltage Range
2.97V To 3.63V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
TQFP
Interface Type
HBI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Highly Efficient 10/100 Ethernet Controller with HP Auto-MDIX
SMSC LAN9215
3.14.1
3.14.2
TX Buffer Format
TX buffers exist in the host’s memory in a given format. The host writes a TX command word into the
TX data buffer before moving the Ethernet packet data. The TX command A and command B are 32-
bit values that are used by the LAN9215 in the handling and processing of the associated Ethernet
packet data buffer. Buffer alignment, segmentation and other packet processing parameters are
included in the command structure. The following diagram illustrates the buffer format.
Figure 3.13, "TX Buffer Format", shows the TX Buffer as it is written into the LAN9215 It should be
noted that not all of the data shown in this diagram is actually stored in the TX data FIFO. This must
be taken into account when calculating the actual TX data FIFO usage. Please refer to
"Calculating Actual TX Data FIFO Usage," on page 51
actual TX data FIFO usage.
Note 3.14 The LAN9215 host bus interface supports 16-bit bus transfers; internally, all data paths are
TX Command Format
The TX command instructs the TX FIFO controller on handling the subsequent buffer. The command
precedes the data to be transmitted. The TX command is divided into two, 32-bit words; TX command
‘A’ and TX command ‘B’.
32-bits wide.
transactions.
Host Write
Order
2nd
3rd
Last
1st
Figure 3.13
Figure 3.13 TX Buffer Format
31
DATASHEET
Offset + Data DWORD0
Optional offset DWORD0
Optional offset DWORDn
Optional Pad DWORDn
Optional Pad DWORD0
TX Command 'B'
describes the host write ordering for pairs of atomic 16-bit
TX Command 'A'
Last Data & PAD
47
.
.
.
.
.
.
.
.
.
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for a detailed explanation on calculating the
0
Revision 1.2 (03-29-06)
Section 3.14.5,

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