DP83848VYB National Semiconductor, DP83848VYB Datasheet - Page 40

TRANSCEIVER, ENET PHY, 10/100, 48LQFP

DP83848VYB

Manufacturer Part Number
DP83848VYB
Description
TRANSCEIVER, ENET PHY, 10/100, 48LQFP
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83848VYB

Data Rate
100Mbps
No. Of Ports
1
Ethernet Type
IEEE 802.3u
Supply Current
92mA
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +105°C
Digital Ic Case Style
LQFP
No.
RoHS Compliant
Interface Type
MII Serial, RMII
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Not Compliant

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Bit
15
14
13
12
11
7.1.6 Auto-Negotiation Link Partner Ability Register (ANLPAR) (BASE Page)
This register contains the advertised abilities of the Link Partner as received during Auto-Negotiation. The content changes after
the successful auto-negotiation if Next-pages are supported.
Bit
4:0
10
9
8
7
6
5
RESERVED
ASM_DIR
Bit Name
TABLE 17. Auto-Negotiation Link Partner Ability Register (ANLPAR) (BASE Page), address 0x05h
ACK
NP
RF
SELECTOR
Bit Name
PAUSE
TX_FD
10_FD
TX
T4
10
Default
<00001>, RW
0, RO
0, RO
0, RO
0, RO
0, RO
Strap, RW
Strap, RW
Strap, RW
Strap, RW
0, RO/P
Default
0, RW
Next Page Indication:
0 = Link Partner does not desire Next Page Transfer.
1 = Link Partner desires Next Page Transfer.
Acknowledge:
1 = Link Partner acknowledges reception of the ability data word.
0 = Not acknowledged.
The Auto-Negotiation state machine will automatically control the this bit based on
the incoming FLP bursts.
Remote Fault:
1 = Remote Fault indicated by Link Partner.
0 = No Remote Fault indicated by Link Partner.
RESERVED for Future IEEE use:
Write as 0, read as 0.
ASYMMETRIC PAUSE:
1 = Asymmetric pause is supported by the Link Partner.
0 = Asymmetric pause is not supported by the Link Partner.
PAUSE Support for Full Duplex Links:
The PAUSE bit indicates that the device is capable of providing the symmetric
PAUSE functions as defined in Annex 31B.
Encoding and resolution of PAUSE bits is defined in IEEE 802.3 Annex 28B,
Tables 28B-2 and 28B-3, respectively. Pause resolution status is reported in
PHYCR[13:12].
1 = Advertise that the DTE (MAC) has implemented both the optional MAC
control sublayer and the pause function as specified in clause 31 and annex 31B
of 802.3u.
0= No MAC based full duplex flow control.
100BASE-T4 Support:
1= 100BASE-T4 is supported by the local device.
0 = 100BASE-T4 not supported.
100BASE-TX Full Duplex Support:
1 = 100BASE-TX Full Duplex is supported by the local device.
0 = 100BASE-TX Full Duplex not supported.
100BASE-TX Support:
1 = 100BASE-TX is supported by the local device.
0 = 100BASE-TX not supported.
10BASE-T Full Duplex Support:
1 = 10BASE-T Full Duplex is supported by the local device.
0 = 10BASE-T Full Duplex not supported.
10BASE-T Support:
1 = 10BASE-T is supported by the local device.
0 = 10BASE-T not supported.
Protocol Selection Bits:
These bits contain the binary encoded protocol selector supported by this port.
<00001> indicates that this device supports IEEE 802.3u.
40
Description
Description

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