DP83848VYB National Semiconductor, DP83848VYB Datasheet - Page 11

• Manufacturer Part Number: DP83848VYB
• Description: TRANSCEIVER, ENET PHY, 10/100, 48LQFP
• Manufacturer: National Semiconductor

Specifications of DP83848VYB

• Data Rate: 100Mbps
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3u
• Supply Current: 92mA
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +105°C
• Digital Ic Case Style: LQFP
• No.: RoHS Compliant
• Interface Type: MII Serial, RMII
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Not Compliant

LED_CFG (CRS)
MDIX_EN (RX_ER)
TD-, TD+
RD-, RD+
RBIAS
PFBOUT
PFBIN1
PFBIN2
RESERVED
IOVDD33
IOGND
DGND
AVDD33
AGND
GNDPAD
1.8 10 Mb/s AND 100 Mb/s PMD INTERFACE
1.9 SPECIAL CONNECTIONS
1.10 POWER SUPPLY PINS
Signal Name
Signal Name
Signal Name
Signal Name
Type
I/O
O
I
I
S, O, PU
S, O, PU
Type
Type
I/O
I/O
20, 21
Pin #
24
23
18
37
Pin #
Pin #
16
17
13
14
40
41
Bias Resistor Connection: A 4.87 kΩ 1% resistor should be connected from RBIAS to
GND.
Power Feedback Output: Parallel caps, 10µF (Tantalum preferred) and 0.1µF, should
be placed close to the PFBOUT. Connect this pin to PFBIN1 (pin 18) and PFBIN2 (pin
37). See Section 5.4 POWER FEEDBACK CIRCUIT for proper placement pin.
Power Feedback Input: These pins are fed with power from PFBOUT pin. A small
capacitor of 0.1µF should be connected close to each pin.
Note: Do not supply power to these pins other than from PFBOUT.
RESERVED: These pins must be pulled-up through 2.2 kΩ resistors to AVDD33 supply.
Differential common driver transmit output (PMD Output Pair). These differential outputs
are automatically configured to either 10BASE-T or 100BASE-TX signaling.
IIn Auto-MDIX mode of operation, this pair can be used as the Receive Input pair.
These pins require 3.3V bias for operation.
Differential receive input (PMD Input Pair). These differential inputs are automatically
configured to accept either 100BASE-TX or 10BASE-T signaling.
In Auto-MDIX mode of operation, this pair can be used as the Transmit Output pair.
In 100BASE-FX mode, this pair becomes the 100BASE-FX Receive pair.
These pins require 3.3V bias for operation.
LED CONFIGURATION: This strapping option determines the mode of operation of the
LED pins. Default is Mode 1. Mode 1 and Mode 2 can be controlled via the strap option.
All modes are configurable via register access.
See Table 3 for LED Mode Selection.
MDIX ENABLE: Default is to enable MDIX. This strapping option disables Auto-MDIX.
An external pull-down will disable Auto-MDIX mode.
32, 38
35, 47
15, 19
Pin #
11
36
22
49
I/O 3.3V Supply
I/O Ground
Digital Ground
Analog 3.3V Supply
Analog Ground
Ground PAD
Description
Description
Description
Description
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