CS8420-CS Cirrus Logic Inc, CS8420-CS Datasheet - Page 75

• Manufacturer Part Number: CS8420-CS
• Description: Transceiver IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS8420-CS

• Audio Control Type: Sample Rate Converter
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -10°C To +70°C
• Audio Ic Case Style: SOIC
• No. Of Pins: 28
• Msl: MSL 2 - 1 Year
• Frequency Max: 108GHz
• Bandwidth: 20kHz
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

16.2 AES3 User (U) Bit Management
The CS8420 U bit manager has four operating
modes:
Mode 1. Transmit all zeros.
Mode 2. Block mode.
Mode 3. Reserved
Mode 4. IEC Consumer B.
16.2.1 Mode 1: Transmit All Zeros
Mode 1 causes only zeros to be transmitted in the
output U data, regardless of E buffer contents or U
data embedded in an input AES3 data stream. This
mode is intended for the user who does not want to
transceive U data, and simply wants the output U
channel to contain no data.
16.2.2 Mode 2: Block Mode
Mode 2 is very similar to the scheme used to con-
trol the C bits. Entire blocks of U data are buffered
from input to output, using a cascade of 3 block-
sized RAMs to perform the buffering. The user has
access to the second of these 3 buffers, denoted the
E buffer, via the control port. Block mode is de-
signed for use in AES3 in, AES3 out situations in
which input U data is decoded using a microcon-
troller via the control port. It is also the only mode
in which the user can merge his own U data into the
transmitted AES3 data stream.
The U buffer access only operates in two byte
mode, since there is no concept of A and B blocks
for user data. The arrangement of the data in the
each byte is that the MSB is the first received bit
and is the first transmitted bit. The first byte read is
the first byte received, and the first byte sent is the
first byte transmitted.
16.2.3 IEC60958 Recommended U Data
Modes (3) and (4) are intended for use in AES3 in,
AES3 out situations, in which the input U data is
formatted as recommended in the “IEC60958 Dig-
DS245PP2
Format For Consumer Applications
ital Audio Interface, part 3: Consumer applica-
tions” document.
In this format, “messages” are formed in the U data
from Information Units or IUs. An IU is 8 bits long,
and the MSB is always 1, and is called the start bit,
or 'P' bit. The remaining 7 bits are called Q R S T U
V & W, and carry the desired data.
A “message” consists of 3 to 129 IUs. Multiple IUs
are considered to be in the same message if they are
separated by zero to eight 0s, denoted here as filler.
A filler sequence of nine or more 0s indicates an in-
ter-message gap. The desired information is nor-
mally carried in the sequence of corresponding bits
in the IUs. For example, the sequential Q bits from
each IU make up the Q sub-code data that is used to
indicate Compact Disk track information. This data
is automatically extracted from the received
IEC60958 stream, and is presented in the control
port register map space.
Where incoming U data is coded in the above for-
mat, and needs to be re-transmitted, the data trans-
fer cannot be done using shift registers, because of
the different Fsi and Fso sampling clocks. Instead,
input data must be buffered in a FIFO structure, and
then read out by the AES3 transmitter at appropri-
ate times.
Each bit of each IU must be transceived; unlike the
audio samples, there can be no sample rate conver-
sion of the U data. Therefore, there are 2 potential
problems:
(1) Message Partitioning
When Fso > Fsi, more data is transmitted than re-
ceived per unit time. The FIFO will frequently be
completely emptied. Sensible behavior must occur
when the FIFO is empty, otherwise, a single incom-
ing message may be erroneously be partitioned into
multiple, smaller, messages.
(2) Overwriting
When Fso < Fsi, more data is received than trans-
mitted per unit time. There is a danger of the FIFO
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