CS8420-CS Cirrus Logic Inc, CS8420-CS Datasheet - Page 52

• Manufacturer Part Number: CS8420-CS
• Description: Transceiver IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS8420-CS

• Audio Control Type: Sample Rate Converter
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -10°C To +70°C
• Audio Ic Case Style: SOIC
• No. Of Pins: 28
• Msl: MSL 2 - 1 Year
• Frequency Max: 108GHz
• Bandwidth: 20kHz
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

COPY - Copy Channel Status Bit Output
ORIG - Original Channel Status Output
PRO/C - Professional Channel Status Bit Output or C-bit Data Input
AUDIO/V - Audio Channel Status Bit Output or V-bit Data Input
Audio Output Interface:
SDOUT - Serial Audio Output Port Data Output
OSCLK - Serial Audio Output Port Bit Clock Input or Output
OLRCK - Serial Audio Output Port Left/Right Clock Input or Output
AES3/SPDIF Transmitter Interface:
TCBL - Transmit Channel Status Block Start
TCBLD - Transmit Channel Status Block Direction Input
TXN, TXP - Differential Line Driver Outputs
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The COPY pin reflects the state of the COPY Channel Status bit in the incoming AES3 type data
stream. This is also a start-up option pin, and requires a pull-up or pull-down resistor.
SCMS generation indicator. This is decoded from the incoming category code and the L bit. A low
output indicates that the audio data stream is 1st generation or higher. A high indicates that the audio
data stream is original.
The PRO/C pin either reflects the state of the Professional/Consumer Channel Status bit in the incoming
AES3 type data stream, or is the serial C-bit input for the AES3 type transmitted data, clocked by
OLRCK.
The AUDIO/V pin either reflects the state of the audio/non audio Channel Status bit in the incoming
AES3 type data stream, or is the V-bit data input for the AES3 type transmitted data stream, clocked by
OLRCK.
Audio data serial output pin. This is also a start-up option pin, and requires a pull-up or pull-down
resistor.
Serial bit clock for audio data on the SDOUT pin.
Word rate clock for the audio data on the SDOUT pin. The frequency will be at the output sample rate
(Fso)
When operated as output, TCBL is high during the first sub-frame of a transmitted channel status block,
and low at all other times. When operated as input, driving TCBL high for at least three OMCK clocks
will cause the current transmitted sub-frame to be the start of a channel status block.
Connect TCBLD to VD+ to set TCBL as an output. Connect TCBLD to DGND to set TCBL as an input.
Differential line driver outputs, transmitting AES3 type data. Drivers are pulled to low while the CS8420
is in the reset state.
CS8420
DS245PP2