CS8420-CS Cirrus Logic Inc, CS8420-CS Datasheet - Page 35

• Manufacturer Part Number: CS8420-CS
• Description: Transceiver IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS8420-CS

• Audio Control Type: Sample Rate Converter
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: -10°C To +70°C
• Audio Ic Case Style: SOIC
• No. Of Pins: 28
• Msl: MSL 2 - 1 Year
• Frequency Max: 108GHz
• Bandwidth: 20kHz
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

11.7
SOMS
SOSF
SORES1-0
SOJUST
SODEL
SOSPOL
SOLRPOL
DS245PP2
SOMS
7
Serial Audio Output Port Data Format (6)
SOSF
0 - Serial audio output port is in slave mode (default)
1 - Serial audio output port is in master mode
0 - 64*Fso (default)
1 - 128*Fso
00 - 24 bit resolution (default)
01 - 20 bit resolution
10 - 16 bit resolution
11 - Direct copy of the received NRZ data from the AES3 receiver (including C, U, and
0 - Left-justified (default)
1 - Right-justified (master mode only)
0 - MSB of SDOUT data occurs in the first OSCLK period after the OLRCK edge
1 - MSB of SDOUT data occurs in the second OSCLK period after the OLRCK edge
0 - SDOUT transitions occur on falling edges of OSCLK (default)
1 - SDOUT transitions occur on rising edges of OSCLK
0 - SDOUT data is for the left channel when OLRCK is high (default)
1 - SDOUT data is for the right channel when OLRCK is high
Master/Slave Mode Selector
OSCLK frequency (for master mode)
Resolution of the output data on SDOUT and on the AES3 output
Justification of SDOUT data relative to OLRCK
Delay of SDOUT data relative to OLRCK, for left-justified data formats
OSCLK clock polarity
OLRCK clock polarity
6
V bits, the time slot normally occupied by the P bit is used to indicate the location
of the block start, SDOUT pin only, serial audio output port clock must be derived
from the AES3 receiver recovered clock)
(default)
SORES1
5
SORES0
4
SOJUST
3
SODEL
2
SOSPOL
1
CS8420
SOLRPOL
0
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