ML610Q432A-NNNTC03A7 Rohm Semiconductor, ML610Q432A-NNNTC03A7 Datasheet - Page 390

• Manufacturer Part Number: ML610Q432A-NNNTC03A7
• Description: MCU 8BIT 64K FLASH 128-TQFP
• Manufacturer: Rohm Semiconductor

Specifications of ML610Q432A-NNNTC03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 4.2MHz
• Connectivity: I²C, SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 2x12b, 2x24b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

In display allocation register A (DSmCnA: m = 0 to 63, n = 0 to 8), set the lower 8 bits (00H to 0FEH) of the addresses
of the display registers (DSPR00 to DSPRFE) that are output to common n of segment n. In display allocation register B
(DSmCnB: m = 0 to 63, n = 0 to 8), set the bits of the display registers (DSPR00 to DSPRFE) that are output to common
n of segment m.
For instance, to display bit 6 of display register 23 to common 3 of segment 16, set as follows.
Note:
- Set display allocation data to display allocation registers A and B when the DASN bit of display control register 0
(DSPMOD1) is “0”. When the DASN bit is “1”, access from the CPU is invalid.
- Select type 3 for the display register segment map (Set DADM1 bit of DSPMOD1 register to “1”) when using the
programmable allocation function.
DS16C3A
(0F4D0H)
"*" indicates an arbitrary value.
Address specification of display register
b7
0
b6
0
b5
1
b4
0
b3
0
b2
0
b1
1
27 – 38
b0
1
DS16C3B
(0F6D0H)
ML610Q431/ML610Q432 User’s Manual
b7
*
Bit specification of display register
b6
*
b5
Chapter 27 LCD Drivers
*
b4
*
b3
*
b2
1
b1
1
b0
0