ML610Q432A-NNNTC03A7 Rohm Semiconductor, ML610Q432A-NNNTC03A7 Datasheet - Page 207
ML610Q432A-NNNTC03A7
Manufacturer Part Number
ML610Q432A-NNNTC03A7
Description
MCU 8BIT 64K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q432A-NNNTC03A7.pdf
(35 pages)
3.ML610Q432A-NNNTC03A7.pdf
(458 pages)
Specifications of ML610Q432A-NNNTC03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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15.2.4
• U0IO (bit 0)
• U0CK1, U0CK0 (bits 2, 1)
• U0RSEL (bit 4)
- Always set the UA0MOD0 register while communication is stopped, and do not rewrite it during communication.
- When specifying LSCLK×2 for the clock, enable the operation of the 2×low-speed clock by setting bit 2 (ENMLT)
- When selecting the P42 pin as the receive data input pin, it is necessary to configure settings for the Port 4 secondary
Address: 0F292H
Access: R/W
Access size: 8/16 bits
Initial value: 00H
UA0MOD0 is a special function register (SFR) to set the transfer mode of the UART.
[Description of Bits]
Notes:
Initial value
UA0MOD0
The U0IO bit is used to select transmit or receive mode.
The U0CK1 and U0CK0 bits are used to select the clock to be input to the baud rate generator of the UART0.
The U0RSEL bit is used to select the receive data input pin for the UART0.
of the frequency control register 1 (FCON1) to “1”.
functions. For the details of the Port 4 secondary function settings, see Chapter 22, “Port 4”.
R/W
U0RSEL
U0CK1
U0IO
0
0
1
0
1
0
1
UART0 Mode Register 0 (UA0MOD0)
U0CK0
R/W
Transmit mode (initial value)
Receive mode
Selects the P02 pin. (Initial value)
Selects the P42 pin.
—
7
0
0
1
*
LSCLK (initial value)
LSCLK×2
HSCLK
R/W
—
0
6
R/W
—
5
0
U0RSEL
Description
Description
R/W
15 – 5
4
0
Description
R/W
—
3
0
ML610Q431/ML610Q432 User’s Manual
U0CK1
R/W
2
0
U0CK0
R/W
0
1
Chapter 15 UART
U0IO
R/W
0
0
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