PIC16F721-I/SO Microchip Technology, PIC16F721-I/SO Datasheet - Page 48

• Manufacturer Part Number: PIC16F721-I/SO
• Description: MCU PIC 4K FLASH 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F721-I/SO

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 17
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 18
• Ram Memory Size: 256Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F/LF720/721
REGISTER 6-1:
REGISTER 6-2:
REGISTER 6-3:
DS41430A-page 48
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note 1: Enabling weak pull-ups also requires that the RABPU bit of the OPTION register be cleared.
U-0
2: If MCLREN = 1, WPUA3 is always enabled.
U-0
U-0
—
—
—
PORTA<3> is input only.
TRISA<3> is unimplemented and read as 1.
Unimplemented: Read as ‘0’
WPUA<5:0>: Weak Pull-up PORTA Control bits
1 =
0 =
Unimplemented: Read as ‘0’
RA<5:0>: PORTA I/O Pin bit
1 = Port pin is > V
0 = Port pin is < V
Unimplemented: Read as ‘0’
TRISA<5:0>: PORTA Tri-State Control bit
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
Weak pull-up enabled
Weak pull-up disabled
U-0
U-0
U-0
—
—
—
PORTA: PORTA REGISTER
TRISA: PORTA TRI-STATE REGISTER
WPUA: WEAK PULL-UP PORTA REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
IH
IL
TRISA5
WPUA5
R/W-x
R/W-1
R/W-1
RA5
(
1
)
TRISA4
R/W-x
R/W-1
RA4
WPUA4
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RA3
R/W-x
—
U-1
WPUA3
(1)
R/W-1
(1)
(2)
TRISA2
R/W-x
R/W-1
RA2
WPUA2
R/W-1
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
TRISA1
WPUA1
R/W-1
R/W-1
R/W-x
RA1
WPUA0
TRISA0
R/W-1
R/W-x
R/W-1
RA0
bit 0
bit 0
bit 0