PIC16F721-I/SO Microchip Technology, PIC16F721-I/SO Datasheet - Page 205

• Manufacturer Part Number: PIC16F721-I/SO
• Description: MCU PIC 4K FLASH 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F721-I/SO

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 17
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 18
• Ram Memory Size: 256Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 23-12:
FIGURE 23-13:
TABLE 23-9:
 2010 Microchip Technology Inc.
Standard Operating Conditions (unless otherwise stated)
Operating Temperature
*
US120* T
US121* T
US122* T
Param.
No.
Note 1: If the A/D clock source is selected as RC, a time of T
These parameters are characterized but not tested.
A/D Data
A/D CLK
BSF ADCON0, GO
ADRES
Sample
Note:
ADIF
GO
CK
CKRF
Symbol
DTRF
Q4
SLEEP instruction to be executed.
AD134
H2
CK
DT
DT
Refer to
AD132
USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
V SYNC XMIT (Master and Slave)
Clock high to data-out valid
Clock out rise time and fall time
(Master mode)
Data-out rise time and fall time
PIC16F720/721 A/D CONVERSION TIMING (SLEEP MODE)
USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
Figure 23-2
-40°C T
(T
OSC
/2 + T
US121
for load conditions.
A
Characteristic
CY
+125°C
7
(1)
)
US120
OLD_DATA
Sampling Stopped
6
AD131
5
US121
CY
3.0-5.5V
1.8-5.5V
3.0-5.5V
1.8-5.5V
3.0-5.5V
1.8-5.5V
4
is added before the A/D clock starts. This allows the
AD130
3
PIC16F/LF720/721
Min.
2
—
—
—
—
—
—
1
Max.
100
80
45
50
45
50
0
US122
NEW_DATA
Units
1 T
ns
ns
ns
ns
ns
ns
DONE
CY
DS41430A-page 205
1 T
CY
Conditions