PIC16F721-I/SO Microchip Technology, PIC16F721-I/SO Datasheet

MCU PIC 4K FLASH 20-SOIC

PIC16F721-I/SO

Manufacturer Part Number
PIC16F721-I/SO
Description
MCU PIC 4K FLASH 20-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F721-I/SO

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
17
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (0.300", 7.50mm Width)
Controller Family/series
PIC16F
No. Of I/o's
18
Ram Memory Size
256Byte
Cpu Speed
16MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
This document includes the
programming specifications for the
following devices:
1.0
The PIC16F/LF720 and PIC16F/LF721 devices are
programmed using In-Circuit Serial Programming™
(ICSP™). This programming specification applies to
the PIC16F/LF720 and PIC16F/LF721 devices in all
packages.
With the exception of memory size and the voltage
regulator, all other aspects of the PIC16F/LF720 and
PIC16F/LF721 devices are identical.
TABLE 1-1:
 2011 Microchip Technology Inc.
• PIC16F720
• PIC16LF720
• PIC16F721
• PIC16LF721
RA1
RA0
MCLR/V
V
V
Legend: I = Input, O = Output, P = Power
Note 1:
DD
SS
Pin Name
OVERVIEW
PP
PIC16(L)F720/721 Flash Memory Programming Specification
To activate the Program/Verify mode, high voltage needs to be applied to MCLR/V
MCLR /V
PIN DESCRIPTIONS DURING PROGRAMMING
Program/Verify mode
PP
is used for a level source, MCLR/V
Function
ICSPCLK
ICSPDAT
V
V
DD
SS
Advance Information
Pin Type
P
I/O
P
P
I
(1)
PIC16(L)F720/721
During Programming
PP
does not draw any significant current.
1.1
PIC16F/LF720 and PIC16F/LF721 devices require one
power supply for V
Section 8.0 “Electrical Specifications”
details.)
1.2
Five pins are needed for ICSP™ programming. The
pins are listed in
Clock Input – Schmitt Trigger Input
Data Input/Output – Schmitt Trigger Input
Program Mode Select/Programming power supply
Power Supply
Ground
Hardware Requirements
Pin Utilization
Table
Pin Description
DD
1-1.
and one for MCLR/V
PP
input. Since the
DS41409B-page 1
for more
PP
. (See

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PIC16F721-I/SO Summary of contents

Page 1

... PIC16(L)F720/721 Flash Memory Programming Specification This document includes the programming specifications for the following devices: • PIC16F720 • PIC16LF720 • PIC16F721 • PIC16LF721 1.0 OVERVIEW The PIC16F/LF720 and PIC16F/LF721 devices are programmed using In-Circuit Serial Programming™ (ICSP™). This programming specification applies to the PIC16F/LF720 and PIC16F/LF721 devices in all packages ...

Page 2

... PP RA2 4 17 RC5 RC0 5 16 RC4 6 15 RC1 RC2 14 RC3 7 RC6 RB4 8 13 RC7 9 12 RB5 RB6 RB7 RA1/ICSPCLK - RC5 2 14 RA2 PIC16F/LF720 RC4 3 13 RC0 PIC16F/LF721 RC3 4 12 RC1 RC6 5 11 RC2 Advance Information  2011 Microchip Technology Inc. ...

Page 3

... Reserved 2004h Reserved 2005h Device ID 2006h Configuration Word 1 2007h Configuration Word 2 2008h Calibration Word 1 2009h 200Ah Calibration Word 2 Reserved 200Bh-21FFh  2011 Microchip Technology Inc. PIC16(L)F720/721 0000 07FFh Maps to 0000h-07FFh 1FFFh 2000h Implemented 2200h Maps to 2000h-2200h 3FFFh Advance Information Program Memory ...

Page 4

... PIC16(L)F720/721 FIGURE 3-2: PIC16F721 AND PIC16LF721 PROGRAM MEMORY MAPPING User ID Location 2000h User ID Location 2001h User ID Location 2002h User ID Location 2003h Reserved 2004h Reserved 2005h Device ID 2006h Configuration Word 1 2007h Configuration Word 2 2008h Calibration Word 1 2009h 200Ah Calibration Word 2 Reserved 200Bh-21FFh ...

Page 5

... REV<4:0>: Revision ID bits These bits are used to identify the revision. Note 1: This location cannot be written. TABLE 3-1: DEVICE ID VALUES DEVICE ID VALUES DEVICE DEV PIC16F720 01 1100 0000 PIC16F721 01 1100 0010 PIC16LF720 01 1100 0100 PIC16LF721 01 1100 0110  2011 Microchip Technology Inc. PIC16(L)F720/721 (1) R-q ...

Page 6

... MHz internal oscillator (INTOSC) and the Brown-out Reset (BOR) are factory calibrated and stored in Calibration Words 1 and 2 (2009h and 200Ah). The Calibration Words do not participate in erase operations. The device can be erased without affecting the Calibration Words. DS41409B-page 6 Advance Information  2011 Microchip Technology Inc. ...

Page 7

... INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI 00 = INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI Note 1: Debug bit is ignored when code-protect is enabled (CP= 0). 2: Fixed Voltage Reference is automatically enabled whenever the BOR is enabled.  2011 Microchip Technology Inc. PIC16(L)F720/721 U-1 U-1 R/P-0 — ...

Page 8

... Note 1: For the PIC16F720/721 only. DS41409B-page 8 U-1 U-1 U-1 — — — R/P-1 U-1 U-1 — — is connected to the pad) DDCORE Advance Information U-1 U-1 — — bit 7 R/P-1 R/P-1 WRT1 WRT0 bit Bit is cleared x = Bit is unknown  2011 Microchip Technology Inc. ...

Page 9

... Begin Internally Timed Programming Begin Externally Timed Programming End Externally Timed Programming Bulk Erase Program Memory Row Erase Program Memory  2011 Microchip Technology Inc. PIC16(L)F720/721 disabled (MCLRE = 0), the power-up time is disabled (PWRTE = 0), the internal oscillator is selected (F = 10x), and RA0 and RA1 are driven by the user ...

Page 10

... The only way to get back to the program memory (address exit Program/Verify mode or issue the Reset Address command after the configuration memory has been accessed by the Load Configuration command DLY 4-2 DLY Advance Information 16 15 LSb MSb LSb MSb 0  2011 Microchip Technology Inc. ...

Page 11

... Address command or exit Program/Verify mode and re- enter it. If the address is incremented from address 1FFFh, it will wrap-around to location 0000h. If the address is incremented from 3FFFh, it will wrap-around to location 2000h. FIGURE 4-4: INCREMENT ADDRESS 1 2 ICSPCLK 0 ICSPDAT  2011 Microchip Technology Inc. PIC16(L)F720/721 Figure 4-3 DLY ...

Page 12

... Programming is used to start the programming. The program memory address programmed is not erased prior to being programmed. FIGURE 4-6: BEGIN INTERNALLY TIMED PROGRAMMING 1 2 ICSPCLK 0 0 ICSPDAT DS41409B-page DLY the that is being PINT Advance Information Next Command 0000h Next Command  2011 Microchip Technology Inc. ...

Page 13

... DIS sending the next command. This delay is longer than the delay ordinarily required between other commands (see Figure 4-8). FIGURE 4-8: END EXTERNALLY TIMED PROGRAMMING 1 2 ICSPCLK 0 ICSPDAT  2011 Microchip Technology Inc. PIC16(L)F720/721 of the . The PEXT End Externally Timed Programming ...

Page 14

... After receiving the Bulk Erase Program Memory command, the erase will not complete until the time interval has expired. ERAB Note: The code protection Configuration bit (CP) has no effect on the Bulk Erase Program Memory command ERAB ERAR Advance Information Next Command Next Command  2011 Microchip Technology Inc. ...

Page 15

... If more than 32 data latches are written without a Begin Externally Timed Programming or Begin Internally Timed Programming command, the data in the data latches will be overwritten. The following figures show the recommended flowcharts for programming.  2011 Microchip Technology Inc. PIC16(L)F720/721 Advance Information DS41409B-page 15 ...

Page 16

... See Figure 5-6. DS41409B-page 16 Start Enter Programming Mode Bulk Erase (3) Device Write Program (1) Memory Write User IDs Verify Program Memory Verify User IDs Write Configuration (2) Words Verify Configuration Words Exit Programming Mode Done Advance Information  2011 Microchip Technology Inc. ...

Page 17

... Note 1: This step is optional if the device has already been erased or has not been previously programmed the device is code-protected or must be completely erased, then Bulk Erase the device per 3: See Figure 5-3 or Figure 5-4.  2011 Microchip Technology Inc. PIC16(L)F720/721 Start Bulk Erase Program (1, 2) Memory ...

Page 18

... PIC16(L)F720/721 FIGURE 5-3: ONE-WORD PROGRAM CYCLE (Internally timed) DS41409B-page 18 Program Cycle Load Data for Program Memory Begin Begin Programming Programming Command Command (Externally timed) Wait T Wait T PEXT PINT End Programming Command Wait T DIS Advance Information  2011 Microchip Technology Inc. ...

Page 19

... FIGURE 5-4: MULTIPLE-WORD PROGRAM CYCLE  2011 Microchip Technology Inc. PIC16(L)F720/721 Program Cycle Load Data Latch 1 for Program Memory Increment Address Command Load Data Latch 2 for Program Memory Increment Address Command Load Data Latch 32 for Program Memory Begin Begin Programming Programming ...

Page 20

... Word 1) Read Data From Program Memory Command Report No Data Correct? Programming Failure Yes Increment Address Command One-word (2) Program Cycle (Config. Word 2) Read Data From Program Data Correct? Memory Command Advance Information Report No Programming Failure Yes Done  2011 Microchip Technology Inc. ...

Page 21

... FIGURE 5-6: ERASE FLOWCHART Note: This sequence does not erase the Calibration Words.  2011 Microchip Technology Inc. PIC16(L)F720/721 Start Load Configuration Bulk Erase Program Memory Done Advance Information DS41409B-page 21 ...

Page 22

... Enabling Code Protection Code protection is enabled by programming the CP bit in Configuration Word 1 to ‘0’. 6.2 Disabling Code Protection The only way to disable code protection is to use the Bulk Erase Program Memory command. DS41409B-page 22 Advance Information  2011 Microchip Technology Inc. ...

Page 23

... The checksum is calculated by two different methods, dependent on the setting of the CP Configuration bit. TABLE 7-1: The Device PIC16F720 PIC16LF720 PIC16F721 PIC16LF721 7.3.1 CODE PROTECTION DISABLED With the code protection disabled, the checksum is computed by reading the contents of the PIC16F/ LF720 and PIC16F/LF721 program memory locations ...

Page 24

... Configuration Word 1 Mask = all Configuration Word bits are set to ‘1’, except for unimplemented bits that are ‘0’ the PIC16LF720 device, the VCAPEN bit is not implemented in Configuration Word 2; thus, all unimplemented bits are ‘0’. EXAMPLE 7-3: CHECKSUM COMPUTED WITH CODE PROTECTION DISABLED (PIC16F721), BLANK DEVICE PIC16F721 Sum of Memory addresses 0000h-0FFFh Configuration Word 1 ...

Page 25

... Configuration Word 1 Mask = all Configuration Word bits are set to ‘1’, except for unimplemented bits that are ‘0’ the PIC16LF721 device, the VCAPEN bit is not implemented in Configuration Word 2; thus, all unimplemented bits are ‘0’.  2011 Microchip Technology Inc. PIC16(L)F720/721 (1) 7156h ...

Page 26

... Sum of User IDs = 333Bh +0013h + 17AFh = 4AFDh Advance Information  2011 Microchip Technology Inc. ...

Page 27

... EXAMPLE 7-6: CHECKSUM COMPUTED WITH CODE PROTECTION ENABLED (PIC16F721), BLANK DEVICE PIC16F721 Configuration Word 1 Configuration Word 1 mask Configuration Word 2 Configuration Word 2 mask (1) User ID (2000h) (1) User ID (2001h) (1) User ID (2002h) (1) User ID (2003h) (4) Sum of User IDs Checksum Note 1: User ID values in this example are random values. ...

Page 28

... Sum of User IDs = 333Bh +0003h + 98D5h = CC13h Advance Information  2011 Microchip Technology Inc. ...

Page 29

... LSb of the first user ID value is the MSb of the sum of user IDs and so on until the LSb of the last user ID value becomes the LSb of the sum of user IDs the PIC16LF721 device, the VCAPEN bit is not implemented in Configuration Word 2; thus, all unimplemented bits are ‘0’.  2011 Microchip Technology Inc. PIC16(L)F720/721 (2) 3FBFh ...

Page 30

... Standard Operating Conditions (unless otherwise stated) Operating Temperature Min. Type. Supply Voltages and currents PIC16F720 2.1 — PIC16F721 PIC16LF720 2.1 — PIC16LF721 PIC16F720 2.7 — PIC16F721 PIC16LF720 2.7 — PIC16LF721 — — — — 8.0 — — — 0.8 V — DD — ...

Page 31

... Externally timed programming pulse T PEXT Time delay from program to compare (HV T DIS discharge time) Time delay when exiting T EXIT Program/Verify mode  2011 Microchip Technology Inc. PIC16(L)F720/721 Standard Operating Conditions (unless otherwise stated) Operating Temperature Min. Type. Max. — — 5 — ...

Page 32

... FIGURE 8-5: FIRST PP ICSPCLK ICSPDAT as Input ICSPDAT as Output ICSPDAT from Input to Output ICSPDAT LAST PP from Output to Input Advance Information PROGRAMMING MODE EXIT – V LAST DD T EXIT IHH CLOCK AND DATA TIMING T T CKH CKL LZD T HZD  2011 Microchip Technology Inc. ...

Page 33

... FIGURE 8-6: COMMAND-PAYLOAD TIMING 1 2 ICSPCLK X X ICSPDAT  2011 Microchip Technology Inc. PIC16(L)F720/721 T DLY LSb Command Advance Information MSb 0 Next Payload Command DS41409B-page 33 ...

Page 34

... PIC16(L)F720/721 APPENDIX A: REVISION HISTORY Revision A (12/2009) Initial release of this document. Revision B (02/2011) Updated the Programming Specification to new format; Revised Figures 3-1, 3-2 and Example 7-3. DS41409B-page 34 Advance Information  2011 Microchip Technology Inc. ...

Page 35

... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 36

... France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08- Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 02/18/11  2011 Microchip Technology Inc. ...

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