PIC16F721-I/SO Microchip Technology, PIC16F721-I/SO Datasheet - Page 204

• Manufacturer Part Number: PIC16F721-I/SO
• Description: MCU PIC 4K FLASH 20-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F721-I/SO

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 17
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 18
• Ram Memory Size: 256Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F/LF720/721
TABLE 23-8:
FIGURE 23-11:
DS41430A-page 204
Standard Operating Conditions (unless otherwise stated)
Operating temperature
AD130* T
AD131
AD132* T
Note 1: The ADRES register may be read on the following T
Param
No.
Note 1: If the A/D clock source is selected as RC, a time of T
*
†
2: Setting of 16.0 s T
3: If ADRC mode is selected for use with V
A/D Data
A/D CLK
BSF ADCON0, GO
ADRES
Sample
T
Sym.
sition Requirements”
These parameters are characterized but not tested.
Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
AD
CNV
ACQ
ADIF
GO
AD134
SLEEP instruction to be executed.
Q4
A/D Clock Period
A/D Internal RC Oscillator
Period
Conversion Time (not including
Acquisition Time)
Acquisition Time
PIC16F720/721 A/D CONVERSION REQUIREMENTS
AD132
PIC16F720/721 A/D CONVERSION TIMING (NORMAL MODE)
Characteristic
-40°C £ T
AD
not recommended for temperature > 85°C.
)
(1)
A
£ +125°C
(T
OSC
/2
(1)
)
7
DD
OLD_DATA
Min.
1.0
4.0
1.0
2.0V, longer acquisition times will be required (see
—
6
AD131
CY
Sampling Stopped
Typ†
10.5
5
2.0
—
—
2
cycle.
CY
is added before the A/D clock starts. This allows the
4
AD130
Max.
16.0
9.0
6.0
—
—
3
Units
T
S
S
S
S
AD
2
V
V
(ADRC mode)
Set GO/DONE bit to new data in A/D
Result register
V
mode
DD
DD
DD
 2.0V
 2.0V
= 3.0V, EC or INTOSC Clock
1
(3)
 2010 Microchip Technology Inc.
(2)
(2)
0
Conditions
Section 9.3 “A/D Acqui-
NEW_DATA
DONE
1 T
CY
1 T
CY