LFXP2-17E-5FN484I Lattice, LFXP2-17E-5FN484I Datasheet - Page 56
LFXP2-17E-5FN484I
Manufacturer Part Number
LFXP2-17E-5FN484I
Description
FPGA - Field Programmable Gate Array 17K LUTs 358 I/O Ins on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet
1.LFXP2-8E-5FTN256I.pdf
(341 pages)
Specifications of LFXP2-17E-5FN484I
Number Of Macrocells
17000
Number Of Programmable I/os
358
Data Ram Size
282624
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
282624
Number Of I /o
358
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP2-17E-5FN484I
Manufacturer:
Lattice
Quantity:
175
Company:
Part Number:
LFXP2-17E-5FN484I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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April 2011
Absolute Maximum Ratings
Recommended Operating Conditions
On-Chip Flash Memory Specifications
© 2011 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
Supply Voltage V
Supply Voltage V
Supply Voltage V
Supply Voltage V
Output Supply Voltage V
Input or I/O Tristate Voltage Applied
Storage Temperature (Ambient) . . . . . . . . . -65 to 150°C
Junction Temperature Under Bias (Tj) . . . . . . . . . +125°C
1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation of the
2. Compliance with the Lattice
3. All voltages referenced to GND.
4. V
5. Overshoot and undershoot of -2V to (V
V
V
V
V
V
t
t
1. V
2. If V
3. See recommended voltages by I/O standard in subsequent table.
4. To ensure proper I/O behavior, V
5. In fpBGA and ftBGA packages, the PLLs are connected to, and powered from, the auxiliary power supply.
N
1. The minimum data retention, t
JCOM
JIND
CC
CCAUX
CCPLL
CCIO
CCJ
PROGCYC
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
nected to the same power supply as V
CCPLL
CCPLL
2
CCIO
2, 3, 4
1
4, 5
Symbol
Symbol
only available on csBGA, PQFP and TQFP packages.
only available on csBGA, PQFP and TQFP packages.
or V
CCJ
is set to 1.2V, they must be connected to the same power supply as V
CC
CCAUX
CCJ
CCPLL
. . . . . . . . . . . . . . . . . . . -0.5 to 1.32V
. . . . . . . . . . . . . . . . . . -0.5 to 3.75V
Core Supply Voltage
Auxiliary Supply Voltage
PLL Supply Voltage
I/O Driver Supply Voltage
Supply Voltage for IEEE 1149.1 Test Access Port
Junction Temperature, Commercial Operation
Junction Temperature, Industrial Operation
Flash Programming Cycles per t
Flash Functional Programming Cycles
4
. . . . . . . . . . . . . . . . -0.5 to 3.75V
. . . . . . . . . . . . . . . . -0.5 to 3.75V
CCIO
Thermal Management
RETENTION
CCIO
. . . . . . . . . . . -0.5 to 3.75V
must be turned off at the same time or earlier than V
CCAUX
IHMAX
, is 20 years.
5
. . . . . . -0.5 to 3.75V
.
+ 2) volts is permitted for a duration of <20 ns.
DC and Switching Characteristics
1, 2, 3
document is required.
Parameter
LatticeXP2 Family Data Sheet
RETENTION
Parameter
3-1
1
CC.
If V
CCAUX.
CCIO
or V
DS1009
CCJ
3.135
3.135
Min.
1.14
1.14
1.14
-40
is set to 3.3V, they must be con-
0
DC and Switching_01.7
Data Sheet DS1009
100,000
10,000
3.465
3.465
3.465
3.465
Max.
Max.
1.26
100
85
Cycles
Units
Units
°C
°C
V
V
V
V
V
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