LFXP2-17E-5FN484I Lattice, LFXP2-17E-5FN484I Datasheet - Page 101

• Manufacturer Part Number: LFXP2-17E-5FN484I
• Description: FPGA - Field Programmable Gate Array 17K LUTs 358 I/O Ins on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-17E-5FN484I

• Number Of Macrocells: 17000
• Number Of Programmable I/os: 358
• Data Ram Size: 282624
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: 282624
• Number Of I /o: 358
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: *
• Operating Temperature: -40°C ~ 100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
May 2007
For Further Information
A variety of technical notes for the LatticeXP2 FPGA family are available on the Lattice Semiconductor web site at 
www.latticesemi.com.
• TN1136,
• TN1137,
• TN1138,
• TN1126,
• TN1139,
• TN1140,
• TN1141,
• TN1142,
• TN1087,
• TN1220,
• TN1130,
• TN1143,
For further information on interface standards refer to the following websites:
• JEDEC Standards (LVTTL, LVCMOS, SSTL, HSTL): www.jedec.org
• PCI: www.pcisig.com
LatticeXP2 sysIO Usage Guide
LatticeXP2 Memory Usage Guide
LatticeXP2 High Speed I/O Interface
LatticeXP2 sysCLOCK PLL Design and Usage Guide
Power Estimation and Management for LatticeXP2 Devices
LatticeXP2 sysDSP Usage Guide
LatticeXP2 sysCONFIG Usage Guide
LatticeXP2 Configuration Encryption and Security Usage Guide
Minimizing System Interruption During Configuration Using TransFR Technology
LatticeXP2 Dual Boot Feature
LatticeXP2 Soft Error Detection (SED) Usage Guide
LatticeXP2 Hardware Checklist
LatticeXP2 Family Data Sheet
6-1
Supplemental Information
Data Sheet DS1009
Further Info_01.1