LFXP2-17E-5FN484I Lattice, LFXP2-17E-5FN484I Datasheet - Page 103
LFXP2-17E-5FN484I
Manufacturer Part Number
LFXP2-17E-5FN484I
Description
FPGA - Field Programmable Gate Array 17K LUTs 358 I/O Ins on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet
1.LFXP2-8E-5FTN256I.pdf
(341 pages)
Specifications of LFXP2-17E-5FN484I
Number Of Macrocells
17000
Number Of Programmable I/os
358
Data Ram Size
282624
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
282624
Number Of I /o
358
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP2-17E-5FN484I
Manufacturer:
Lattice
Quantity:
175
Company:
Part Number:
LFXP2-17E-5FN484I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
August 2008
June 2008
April 2008
April 2011
(cont.)
Date
Version
(cont.)
01.4
01.5
01.6
01.7
Characteristics (cont.)
Ordering Information
Pinout Information
Pinout Information
DC and Switching
DC and Switching
DC and Switching
DC and Switching
Characteristics
Characteristics
Characteristics
Architecture
Architecture
Section
—
Updated Flash Download Time (From On-Chip Flash to SRAM) Table
Updated Flash Program Time Table
Updated Flash Erase Time Table
Updated FlashBAK (from EBR to Flash) Table
Updated Hot Socketing Specifications Table footnotes
Updated Signal Descriptions Table
Removed Read-Before-Write sysMEM EBR mode.
Clarification of the operation of the secondary clock regions.
Removed Read-Before-Write sysMEM EBR mode.
Updated DDR Banks Bonding Out per I/O Bank section of Pin Informa-
tion Summary Table.
Data sheet status changed from preliminary to final.
Clarification of the operation of the secondary clock regions.
Removed “8W” specification from Hot Socketing Specifications table.
Removed "8W" footnote from DC Electrical Characteristics table.
Updated Register-to-Register Performance table.
Removed “8W” option from Part Number Description.
Removed XP2-17 “8W” OPNs.
Recommended Operating Conditions table, added footnote 5.
On-Chip Flash Memory Specifications table, added footnote 1.
BLVDS DC Conditions, corrected column title to be Z0 = 90 ohms.
sysCONFIG Port Timing Specifications table, added footnote 1 for
t
DINIT
.
7-2
Change Summary
LatticeXP2 Family Data Sheet
Revision History
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