AFS600-PQG208 Actel, AFS600-PQG208 Datasheet - Page 55

FPGA - Field Programmable Gate Array 600K System Gates

AFS600-PQG208

Manufacturer Part Number
AFS600-PQG208
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS600-PQG208

Processor Series
AFS600
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
95
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
600 K
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AFS600-PQG208
Manufacturer:
Actel
Quantity:
135
Part Number:
AFS600-PQG208
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
AFS600-PQG208I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Note:
Figure 2-31 • State Diagram for All Different Power Modes
* To enter and exit standby mode without any external stimulus on PUB or TRST, the vr_en_mat in the
CTRL_STAT register must also be set to 1, so that RTCPSMMATCH will assert when a match occurs; hence the
device exits standby mode.
OFF State
3.3 V Off,
PUB Pull-Up,
TRST Pull-Down,
VREN Disabled
When TRST is 1 or PUB is 0, the 1.5 V voltage regulator is always ON, putting the Fusion device in
normal operation at all times. Therefore, when the JTAG port is not in reset, the Fusion device cannot
enter sleep mode or standby mode.
To enter standby mode, the Fusion device must first power-up into normal operation. The RTC is
enabled through the RTC Control/Status Register described in the
macro)" section on page
Register. The 1.5 V voltage regulator is disabled by setting VRPU to 0 to allow the Fusion device to enter
standby mode, when the 1.5 V supply is off but the RTC remains on.
3.3 V OFF
VINITSTATE = 0
And PUB = 1
And TRST = 0
VRINITSTATE = 1
or PUB = 0
or TRST = 1
3.3 V Power Supply ON/OFF
2-35. A match value corresponding to the wake-up time is loaded into the Match
VRPU = 0
And PUB = 1
And TRST = 0
VREN Disabled
Sleep Mode
3.3 V On,
3.3 V ON, 1.5 V ON (VR on)
Normal Operation
VREN Enable
R e v i s i o n 1
3.3 V ON
3.3 V on,
PUB = 0
or TRST = 1
*RTCPSMMATCH = 1
Or TRST = 1
Actel Fusion Family of Mixed Signal FPGAs
Or PUB = 0
"Real-Time Counter (part of AB
VRPU = 0
And PUB = 1
And TRST = 0
And *RTC: CTRL_STAT:
xtal_en = 1
VREN Disabled
Standby Mode
RTC Enabled
3.3 V On,
2- 39

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