AFS600-PQG208 Actel, AFS600-PQG208 Datasheet - Page 150

FPGA - Field Programmable Gate Array 600K System Gates

AFS600-PQG208

Manufacturer Part Number
AFS600-PQG208
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS600-PQG208

Processor Series
AFS600
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
95
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
600 K
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
AFS600-PQG208
Manufacturer:
Actel
Quantity:
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Device Architecture
User I/Os
2- 13 4
Introduction
Fusion devices feature a flexible I/O structure, supporting a range of mixed voltages (1.5 V, 1.8 V, 2.5 V,
and 3.3 V) through a bank-selectable voltage.
page 2-137
drive strengths, weak pull-up, and weak pull-down circuits. 3.3 V PCI and 3.3 V PCI-X are 5 V–tolerant.
See the
All I/Os are in a known state during power-up, and any power-up sequence is allowed without current
impact. Refer to the
and Industrial)" section on page 3-5
OFF, V
outputs are tristated, and digital bibufs (input/output) are tristated.
I/O Tile
The Fusion I/O tile provides a flexible, programmable structure for implementing a large number of I/O
standards. In addition, the registers available in the I/O tile in selected I/O banks can be used to support
high-performance register inputs and outputs, with register enable if desired
page
structure (see the
As depicted in
output enable register share one CLK port. Refer to the
information.
I/O Banks and I/O Standards Compatibility
The digital I/Os are grouped into I/O voltage banks. There are three digital I/O banks on the AFS090 and
AFS250 devices and four digital I/O banks on the AFS600 and AFS1500 devices.
page 2-160
the I/O in the AFS600 and AFS1500 devices comprises two banks of Actel Pro I/Os. The Actel Pro I/Os
support a wide number of voltage-referenced I/O standards in addition to the multitude of single-ended
and differential I/O standards common throughout all Actel digital I/Os. Each I/O voltage bank has
dedicated I/O supply and ground voltages (V
buffers). Because of these dedicated supplies, only I/Os with compatible standards can be assigned to
the same I/O voltage bank.
compatibility values for each of these voltages.
For more information about I/O and global assignments to I/O banks, refer to the specific pin table of the
device in the
page
Each Pro I/O bank is divided into minibanks. Any user I/O in a V
scope of a V
needed to control the entire V
determined by the I/O name. For details, see the
Table 2-67 on page 2-136
voltage levels.
I/O standards are compatible if the following are true:
2-135). The registers can also be used to support the JESD-79C DDR standard within the I/O
2-160.
CC33A
Their V
If both of the standards need a V
"5 V Input Tolerance" section on page 2-146
show the voltages and the compatible I/O standards. I/Os provide programmable slew rates,
and
REF
"Package Pin Assignments" on page 4-1
is ON, V
CCI
Figure 2-98 on page
Figure 2-112 on page 2-161
pin) can be configured as a V
"Double Data Rate (DDR) Support" section on page 2-141
values are identical.
"I/O Power-Up and Supply Voltage Thresholds for Power-On Reset (Commercial
CCI
shows the I/O standards supported by Fusion devices and the corresponding
is ON) or when the resource is not used, digital inputs are tristated, digital
Table 2-66
REF
2-140, all I/O registers share one CLR port. The output register and
minibank. The location and scope of the V
for more information. In low power standby or sleep mode (V
REF
and
, their V
R e visio n 1
show the bank configuration by device. The north side of
REF
CCI
Table 2-67 on page 2-136
Table
"User I/O Naming Convention" section on page
pin
/GNDQ for input buffers and V
REF
for possible implementations of 5 V tolerance.
(Figure 2-97 on page
2-65,
and the
values must be identical (Pro I/O only).
"I/O Registers" section on page 2-140
Table
"User I/O Naming Convention" section on
REF
2-66,
minibank (a minibank is the region of
Table
2-135). Only one V
show the required voltage
for more information).
2-67, and
REF
CCI
minibanks can be
/GND for output
(Figure 2-97 on
Figure 2-111 on
Table 2-68 on
REF
for more
2-160.
pin is
CC
is

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