ATMEGA32M1-AUR Atmel, ATMEGA32M1-AUR Datasheet - Page 176

• Manufacturer Part Number: ATMEGA32M1-AUR
• Description: IC MPU AVR 32K 20MHZ 32TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32M1-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -

19.7
19.7.1
19.7.2
19.7.3
19.7.4
176
CAN Timer
ATmega16M1/32M1/64M1
Prescaler
16-bit Timer
Time Triggering
Stamping Message
The data index (INDX) is the address pointer to the required data byte. The data byte can be
read or write. The data index is automatically incremented after every access if the AINC* bit is
reset. A roll-over is implemented, after data index=7 it is data index=0.
The first byte of a CAN frame is stored at the data index=0, the second one at the data index=1,
...
A programmable 16-bit timer is used for message stamping and time trigger communication
(TTC).
Figure 19-11. CAN Timer Block Diagram
An 8-bit prescaler is initialized by CANTCON register. It receives the clk
8. It provides clk
T
This timer starts counting from 0x0000 when the CAN controller is enabled (ENFG bit). When
the timer rolls over from 0xFFFF to 0x0000, an interrupt is generated (OVRTIM).
Two synchronization modes are implemented for TTC (TTC bit):
In TTC mode, a frame is sent once, even if an error occurs.
The capture of the timer value is done in the MOb which receives or sends the frame. All man-
aged MOb are stamped, the stamping of a received (sent) frame occurs on RxOk (TXOK).
RXOK[i]
clk
TXOK[i]
clk
CANTIM
– synchronization on Start of Frame (SYNCTTC=0)
– synchronization on End of Frame (SYNCTTC=1)
IO
OVRTIM
=
T
clk
CANTIM
8
IO
CANSTM[i]
x 8 x (CANTCON [7:0] + 1)
overrun
frequency to the CAN Timer if the CAN controller is enabled.
CANTCON
CANTIM
clk
CANTIM
ENFG
CANTTC
IO
TTC
frequency divided by
SYNCTTC
8209D–AVR–11/10
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