ATMEGA32M1-AUR Atmel, ATMEGA32M1-AUR Datasheet - Page 169
![IC MPU AVR 32K 20MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA32M1-AUR
Manufacturer Part Number
ATMEGA32M1-AUR
Description
IC MPU AVR 32K 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32M1-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
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19.4
Figure 19-5. CAN Controller Structure
8209D–AVR–11/10
CAN Controller
CAN Data Buffers
Buffer MOb i
Buffer MOb2
Buffer MOb1
Buffer MOb0
The CAN controller implemented into ATmega16M1/32M1/64M1 offers V2.0B Active.
This full-CAN controller provides the whole hardware for convenient acceptance filtering and
message management. For each message to be transmitted or received this module contains
one so called message object in which all information regarding the message (for example iden-
tifier, data bytes etc.) are stored.
During the initialization of the peripheral, the application defines which messages are to be sent
and which are to be received. Only if the CAN controller receives a message whose identifier
matches with one of the identifiers of the programmed (receive-) message objects the message
is stored and the application is informed by interrupt. Another advantage is that incoming remote
frames can be answered automatically by the full-CAN controller with the corresponding data
frame. In this way, the CPU load is strongly reduced compared to a basic-CAN solution.
Using full-CAN controller, high baudrates and high bus loads with many messages can be
handled.
Mailbox
Message Objets
Control
Status
IDtag+IDmask
Time Stamp
Control
Status
IDtag+IDmask
Time Stamp
Control
Status
IDtag+IDmask
Time Stamp
Control
Status
IDtag+IDmask
Time Stamp
MOb i
MOb2
MOb1
MOb0
Scanning
MOb
Low priority
High priority
ATmega16M1/32M1/64M1
Gen. Control
Gen. Status
Enable MOb
Interrupt
Bit Timing
Line Error
CAN Timer
CAN Channel
MAC
LCC
PLS
Internal
Internal
RxCAN
TxCAN
169
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