ATMEGA325A-AUR Atmel, ATMEGA325A-AUR Datasheet - Page 18
![IC MCU AVR 32K FLASH 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA325A-AUR
Manufacturer Part Number
ATMEGA325A-AUR
Description
IC MCU AVR 32K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA325A-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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7. AVR Memories
7.1
18
In-System Reprogrammable Flash Program Memory
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
This section describes the different memories in the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P. The AVR archi-
tecture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P fea-
tures an EEPROM Memory for data storage. All three memory spaces are linear and regular.
The ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P contains
16/32/64K bytes On-chip In-System Reprogrammable Flash memory for program storage. Since
all AVR instructions are 16 or 32 bits wide, the Flash is organized as 8K x 16. For software secu-
rity, the Flash Program memory space is divided into two sections, Boot Program section and
Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P Program Counter
(PC) is 13/14/15 bits wide, thus addressing the 8/16/32K program memory locations. The opera-
tion of Boot Program section and associated Boot Lock bits for software protection are described
in detail in
Programming” on page 283
using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
”Boot Loader Support – Read-While-Write Self-Programming” on page
15.
contains a detailed description on Flash data serial downloading
”Instruction Execution Tim-
266.
8285B–AVR–03/11
”Memory
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