ATMEGA325A-AUR Atmel, ATMEGA325A-AUR Datasheet - Page 172

• Manufacturer Part Number: ATMEGA325A-AUR
• Description: IC MCU AVR 32K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA325A-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.3.1
19.3.2
172
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Internal Clock Generation – The Baud Rate Generator
Double Speed Operation (U2Xn)
Signal description:
Internal clock generation is used for the asynchronous and the synchronous master modes of
operation. The description in this section refers to
The USART Baud Rate Register (UBRRn) and the down-counter connected to it function as a
programmable prescaler or baud rate generator. The down-counter, running at system clock
(f
the UBRRLn Register is written. A clock is generated each time the counter reaches zero. This
clock is the baud rate generator clock output (= f
baud rate generator clock output by 2, 8 or 16 depending on mode. The baud rate generator out-
put is used directly by the Receiver’s clock and data recovery units. However, the recovery units
use a state machine that uses 2, 8 or 16 states depending on mode set by the state of the
UMSELn, U2Xn and DDR_XCK bits.
Table 19-1
ing the UBRRn value for each mode of operation using an internally generated clock source.
Table 19-1.
Note:
Some examples of UBRRn values for some system clock frequencies are found in
(see
The transfer rate can be doubled by setting the U2Xn bit in UCSRnA. Setting this bit only has
effect for the asynchronous operation. Set this bit to zero when using synchronous operation.
Operating Mode
Asynchronous Normal
mode (U2Xn = 0)
Asynchronous Double
Speed mode (U2Xn = 1)
Synchronous Master
mode
osc
), is loaded with the UBRRn value each time the counter has counted down to zero or when
page
txclk
rxclk
xcki
xcko
fosc
BAUD
f
UBRRn
OSC
1. The baud rate is defined to be the transfer rate in bit per second (bps)
189).
contains equations for calculating the baud rate (in bits per second) and for calculat-
Equations for Calculating Baud Rate Register Setting
operation.
Transmitter clock (Internal Signal).
Receiver base clock (Internal Signal).
Input from XCK pin (internal Signal). Used for synchronous slave
Clock output to XCK pin (Internal Signal). Used for synchronous master
operation.
XTAL pin frequency (System Clock).
Baud rate (in bits per second, bps)
System Oscillator clock frequency
Contents of the UBRRHn and UBRRLn Registers, (0-4095)
Equation for Calculating Baud
BAUD
BAUD
BAUD
=
=
=
Rate
----------------------------------------- -
16 UBRRn
-------------------------------------- -
8 UBRRn
-------------------------------------- -
2 UBRRn
(
(
(
(1)
f
f
f
OSC
OSC
OSC
Figure
osc
+
+
/(UBRRn+1)). The Transmitter divides the
+
1
1
1
)
)
)
19-2.
Equation for Calculating UBRRn
UBRRn
UBRRn
UBRRn
=
=
=
Value
----------------------- - 1
16BAUD
------------------- - 1
8BAUD
------------------- - 1
2BAUD
f
f
f
OSC
OSC
OSC
8285B–AVR–03/11
Table 19-4
–
–
–