FDMS7656AS Fairchild Semiconductor, FDMS7656AS Datasheet - Page 2
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FDMS7656AS
Manufacturer Part Number
FDMS7656AS
Description
MOSFET N-CH 30V POWER56
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®, SyncFET™r
Datasheet
1.FDMS7656AS.pdf
(8 pages)
Specifications of FDMS7656AS
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
1.8 mOhm @ 30A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
31A
Vgs(th) (max) @ Id
3V @ 1mA
Gate Charge (qg) @ Vgs
133nC @ 10V
Input Capacitance (ciss) @ Vds
8705pF @ 15V
Power - Max
2.5W
Mounting Type
Surface Mount
Package / Case
8-PQFN, Power56
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
1.8 m Ohms
Forward Transconductance Gfs (max / Min)
161 ns
Drain-source Breakdown Voltage
30 V
Continuous Drain Current
49 A
Power Dissipation
96 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDMS7656AS
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
FDMS7656AS Rev.C
Notes:
1. R
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3. E
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
BV
∆BV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
Q
V
t
Q
∆V
DSS
GSS
d(on)
r
d(off)
f
rr
DS(on)
the user's board design.
FS
GS(th)
SD
iss
oss
rss
g
∆T
∆T
g
g
gs
gd
rr
Symbol
θJA
AS
DSS
GS(th)
DSS
J
J
of 242 mJ is based on starting T
is determined with the device mounted on a 1 in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current, Forward
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
J
= 25
Parameter
°
C, L = 1 mH, I
2
T
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
J
= 25 °C unless otherwise noted
AS
a. 50 °C/W when mounted on a
= 22 A, V
1 in
2
pad of 2 oz copper.
DD
= 27 V, V
V
V
V
V
V
f = 1 MHz
V
I
V
V
V
V
V
V
V
I
I
I
V
V
D
F
D
D
DD
GS
GS
GS
GS
GS
GS
GS
GS
DS
DS
GS
GS
DS
GS
= 30 A, di/dt = 300 A/µs
= 10 mA, referenced to 25 °C
= 1 mA, V
= 10 mA, referenced to 25 °C
= 15 V, V
= 15 V, I
= 10 V, R
= 0 V to 10 V
= 0 V to 4.5 V
= 5 V, I
= 0 V, I
= 0 V, I
GS
= 24 V, V
= V
= 10 V, I
= 7 V, I
= 4.5 V, I
= 10 V, I
= 20 V, V
2
= 10 V. 100% test at L = 0.3 mH, I
DS
Test Conditions
, I
D
D
S
S
D
GS
D
D
D
= 30 A
D
= 30 A
= 2 A
= 27 A
GS
GEN
GS
DS
= 1 mA
= 30 A,
= 30 A
= 30 A, T
= 25 A
= 0 V
= 0 V,
= 0 V
= 0 V
= 6 Ω
V
I
D
DD
= 30 A
= 15 V,
J
= 125 °C
(Note 2)
(Note 2)
θJC
AS
is guaranteed by design while R
= 34 A.
Min
1.2
30
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
6545
2465
18.2
0.37
0.74
210
161
9.1
0.5
Typ
1.6
1.3
1.5
1.6
1.8
22
12
50
95
43
50
84
-5
7
19
8705
3280
133
Max
315
136
1.1
0.7
1.2
θCA
500
100
3.0
1.8
1.9
2.0
2.5
35
21
80
13
60
81
www.fairchildsemi.com
is determined by
mV/°C
mV/°C
Units
mΩ
nC
nC
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
µA
nA
ns
Ω
V
V
S
V