ATA3745P3-TGQY Atmel, ATA3745P3-TGQY Datasheet - Page 21

• Manufacturer Part Number: ATA3745P3-TGQY
• Description: IC UHF ASK/FSK RECEIVER 20SOIC
• Manufacturer: Atmel

Specifications of ATA3745P3-TGQY

• Frequency: 310MHz ~ 440MHz
• Sensitivity: -108dBm
• Data Rate - Maximum: 10 kBaud
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, TPM, Security Systems
• Current - Receiving: 7mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: ATA3745P3-TGQYTR

5.5.1
Figure 5-13. Generation of the Power-on Reset
Figure 5-14. Timing of the Register Programming
4901B–RKE–11/07
Serial bi-directional
(microcontroller)
DATA (ATA3745)
data line
Conservation of the Register Information
DATA (ATA3745)
Out1
POR
V
Receiving
S
mode
X
X
The ATA3745 has integrated power-on reset and brown-out detection circuitry to provide a
mechanism to preserve the RAM register information.
According to
below the threshold voltage V
uration registers in that condition. Once V
minimum reset period t
turned on.
To indicate that condition, the receiver displays a reset marker (RM) at pin DATA after a reset.
The RM is represented by the fixed frequency f
via an "L" pulse t1 at pin DATA. The RM implies the following characteristics:
By means of that mechanism, the receiver cannot lose its register information without commu-
nicating that condition via the reset marker RM.
X
• f
• If the receiver is set back to polling mode via pin DATA, RM cannot be canceled by accident
be misinterpreted by the connected microcontroller.
if t1 is applied according to the proposal in
page
RM
t
1
is lower than the lowest feasible frequency of a data signal. By this means, RM cannot
22.
t
Rst
t
2
Figure
t
3
(Start bit)
5-13, a power-on reset (POR) is generated if the supply voltage V
Bit 1
t
("0")
4
Rst
t
5
t
t
6
7
. A POR is also generated when the supply voltage of the receiver is
V
Threset
ThReset
(Register
select)
Programming frame
Bit 2
("1")
. The default parameters are programmed into the config-
S
exceeds V
“Programming the Configuration Register” on
RM
(Poll 8)
at a 50% duty cycle. RM can be canceled
Bit 13
("0")
ThReset
1/f
RM
, the POR is canceled after the
(Poll 8R)
Bit 14
("1")
t
8
t
9
ATA3745
T
Sleep
Start-up
mode
X
X
S
drops
21