ATA3745P3-TGQY Atmel, ATA3745P3-TGQY Datasheet - Page 16

IC UHF ASK/FSK RECEIVER 20SOIC

ATA3745P3-TGQY

Manufacturer Part Number
ATA3745P3-TGQY
Description
IC UHF ASK/FSK RECEIVER 20SOIC
Manufacturer
Atmel
Datasheet

Specifications of ATA3745P3-TGQY

Frequency
310MHz ~ 440MHz
Sensitivity
-108dBm
Data Rate - Maximum
10 kBaud
Modulation Or Protocol
ASK, FSK
Applications
RKE, TPM, Security Systems
Current - Receiving
7mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (0.300", 7.50mm Width)
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
ATA3745P3-TGQYTR

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATA3745P3-TGQY
Manufacturer:
Atmel
Quantity:
1 973
Figure 5-9.
Figure 5-10. Steady L State Limited DATA Output Pattern after Transmission
5.4.2
16
ATA3745
Enable IC
Bit check
Dem_out
Switching the Receiver Back to Sleep Mode
Dem_out
DATA
DATA
Debouncing of the Demodulator Output
Sleep mode
Lim_min
After the end of a data transmission, the receiver remains active and random noise pulses
appear at pin DATA. The edge-to-edge time period t
equal to or slightly higher than T
The receiver can be set back to polling mode via pin DATA or via pin ENABLE.
When using pin DATA, this pin must be pulled to low for the period t1 by the connected micro-
controller.
5-15 on page
for t1 is not limited, but it is recommended not to exceed the specified value to prevent erasing
the reset marker. This item is explained in more detail in
page
OPMODE register to “1”. Only one synchronous pulse (t3) is issued.
The duration of the OFF command is determined by the sum of t1, t2 and t10. After the OFF
command, the sleep time T
The resulting time constant t together with an optional external pull-up resistor should not be
exceeded, to ensure proper operation.
If the receiver is set to polling mode via pin ENABLE, an "L" pulse (T
that pin.
of this pulse, the sleep time T
ENABLE is held to "L". If the receiver is polled exclusively by a microcontroller, T
programmed to “0” to enable an instantaneous response time. This command is the faster
option than via pin DATA, at the cost of an additional connection to the microcontroller.
18. Setting the receiver to sleep mode via DATA is achieved by programming bit 1 of the
CV_Lim < Lim_max
t
Figure 5-12 on page 17
ee
Figure 5-11 on page 17
Bit-check mode
22). The minimum value of t1 depends on the BR_Range. The maximum value
CV_Lim < Lim_min or CV_Lim
t
min1
Sleep
Sleep
DATA_min
elapses. Note that the capacitive load at pin DATA is limited.
illustrates the timing of that command. After the positive edge
Receiving mode
illustrates the timing of the OFF command (see also
elapses. The receiver remains in sleep mode as long as
t
ee
.
Lim_max
t
min2
ee
of the majority of these noise pulses is
t
min2
“Configuration of the Receiver” on
t
DATA_L_max
Doze
) must be issued at
4901B–RKE–11/07
Sleep
can be
Figure

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