ATA3745P3-TGQY Atmel, ATA3745P3-TGQY Datasheet
ATA3745P3-TGQY
Specifications of ATA3745P3-TGQY
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ATA3745P3-TGQY Summary of contents
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... RF low-cost data transmission systems with low data rates from 1 kBaud to 10 kBaud in Manchester or Bi-phase code. The receiver is well-suited to operate with Atmel’s PLL RF transmitter ATA2745. It can be used in the frequency receiving range of f mission. All the statements made below refer to 433.92 MHz and 315 MHz applications ...
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Figure 1-1. System Block Diagram UHF ASK/FSK Remote control transmitter 1 Li cell ATA2745 Encoder ATARx9x Keys XTO Figure 1-2. Block Diagram ASK CDEM AVCC AGND DGND MIXVCC LNAGND LNA_IN ATA3745 2 PLL Antenna Antenna VCO Power amp. Dem_out Demodulator ...
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Pin Configuration Figure 2-1. Pinning SO20 Table 2-1. Pin Description Pin Symbol Function 1 NC Not connected 2 ASK ASK high 3 CDEM Lower cut-off frequency data filter 4 AVCC Analog power supply 5 AGND Analog ground 6 DGND ...
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RF Front End The RF front end of the receiver is a heterodyne configuration that converts the input signal into a 1-MHz IF signal. As shown in the block diagram, the front end consists of an LNA (low noise ...
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To determine f IF frequency is f filter is tuned by the crystal frequency f and f las: MODE MODE The relation is designed to achieve the nominal IF frequency of f tions. For applications where 433.92 ...
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Figure 3-2. Input Matching Network With SAW Filter 433.92 MHz RF TOKO ® LL2012 RF F33NJ IN_GND 8.2 pF Figure 3-3. ...
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Analog Signal Processing 4.1 IF Amplifier The signals coming from the RF front end are filtered by the fully integrated 4th-order IF filter cente r frequ ency 433.92 MHz is used. For ...
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The cut-off frequency of the low-pass filter is defined by the selected baud rate range (BR_Range). BR_Range is defined in the OPMODE register (refer to Receiver” on page The ATA3745 is designed to operate with data encoding where the DC ...
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Polling Circuit and Control Logic The receiver is designed to consume less than 1 mA while being sensitive to signals from a corresponding transmitter. This is achieved via the polling circuit. This circuit enables the sig- nal path periodically ...
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Most applications are dominated by two transmission frequencies: f used in the USA, f dent parameters, the electrical characteristics display three conditions for each parameter. • USA applications (f XTO • European applications (f XTO • Other applications (T characteristic ...
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Sleep Mode The length of period T extension factor X calculated to be: T Sleep In US and European applications, the maximum value The time resolution is about that case. The sleep ...
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Figure 5-2. Polling Mode Flow Chart Sleep Mode: All circuits for signal processing are disabled. Only XTO and Polling logic are enabled SON T = Sleep Sleep Start-up Mode: The signal processing circuits are enabled. After ...
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Bit Check Mode In bit check mode, the incoming data stream is examined to distinguish between a valid signal from a corresponding transmitter and signals due to noise. This is done by subsequent time frame checks where the distances ...
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Figure Lim_min = 14 and Lim_max = 24. When the IC is enabled, the signal processing circuits are enabled during T period. When the bit check becomes active, the bit check counter is clocked with the cycle T XClk Figure ...
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Duration of the Bit Check If no transmitter signal is present during the bit check, the output of the demodulator delivers random signals. The bit check is a statistical process and T Therefore, an average value for T page ...
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Figure 5-9. Debouncing of the Demodulator Output Dem_out DATA Lim_min Figure 5-10. Steady L State Limited DATA Output Pattern after Transmission Enable IC Bit check Dem_out DATA Sleep mode After the end of a data transmission, the receiver remains active ...
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Figure 5-11. Timing Diagram of the OFF Command Via Pin DATA Out1 (microcontroller) DATA (ATA3745) X Serial bi-directional X data line Receiving mode Figure 5-12. Timing Diagram of the OFF Command Via Pin ENABLE ENABLE DATA (ATA3745) Serial bi-directional data ...
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Configuration of the Receiver The ATA3745 receiver is configured via two 12-bit RAM registers called OPMODE and LIMIT. The registers can be programmed by means of the bi-directional DATA port. If the register contents have changed due to a ...
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Table 5-3. Effect of the Configuration Word BR_Range BR_Range Baud1 Baud0 Table 5-4. Effect of the Configuration Word N N Bitcheck BitChk1 BitChk0 Table ...
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Table 5-7. Effect of the Configuration Word X X Sleep X X SleepStd SleepTemp Table 5-8. Effect of the Configuration Word Lim_min Lim_min Lim_min < not applicable ...
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Conservation of the Register Information The ATA3745 has integrated power-on reset and brown-out detection circuitry to provide a mechanism to preserve the RAM register information. According to below the threshold voltage V uration registers in that condition. Once V ...
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Programming the Configuration Register The configuration registers are programmed serially via the bi-directional data line according to Figure 5-14 on page 21 Figure 5-15. One-wire Connection to a Microcontroller To start programming, the serial data line DATA is pulled ...
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Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated ...
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Electrical Characteristics (Continued) All parameters refer to GND 5V range refer to different circuit conditions: V Parameters Local Oscillator Operating frequency range VCO Loop bandwidth of the PLL Capacitive load at pin LF XTO operating ...
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Electrical Characteristics (Continued) All parameters refer to GND 5V range refer to different circuit conditions: V Parameters Recommended CDEM for best performance Maximum edge-to-edge time period of the input data signal for full sensitivity Minimum ...
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Electrical Characteristics All parameters refer to GND 5V range refer to different circuit conditions: V Parameter Test Condition Symbol Basic Clock Cycle of the Digital Circuitry Basic clock MODE = 0 (USA) cycle MODE = ...
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Electrical Characteristics All parameters refer to GND 5V range refer to different circuit conditions: V Parameter Test Condition Symbol OFF command at pin ENABLE (Figure 5-12 on page 17) Configuration of the Receiver Frequency of ...
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Electrical Characteristics All parameters refer to GND 5V range refer to different circuit conditions: V Parameter Test Condition Symbol Programming pulse (Figure 5-11 on page 17, Figure 5-14 on page 21) Equivalent acknowledge pulse: E_Ack ...
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... Ordering Information Extended Type Number ATA3745P3-TGQY 11. Package Information Package SO20 Dimensions in mm 0.4 1. 12. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 4901B-RKE-11/07 4901B–RKE–11/07 Package ...
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