AD6655BCPZ-105 Analog Devices Inc, AD6655BCPZ-105 Datasheet - Page 20

• Manufacturer Part Number: AD6655BCPZ-105
• Description: IC IF RCVR 14BIT 105MSPS 64LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD6655BCPZ-105

• Function: IF Diversity Receiver
• Frequency: 450MHz
• Rf Type: Cellular, CDMA2000, GSM EDGE, W-CDMA
• Secondary Attributes: 32-Bit Numerically Controlled Oscillator
• Package / Case: 64-VFQFN, CSP Exposed Pad
• Receiving Current: 575mA
• Frequency Range: 450MHz
• Rf Ic Case Style: LFCSP
• No. Of Pins: 64
• Supply Voltage Range: 1.7V To 1.9V
• Operating Temperature Range: -40°C To +85°C
• Frequency Max: 650MHz
• Data Rate Max: 105Mbps
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD6655-150EBZ - BOARD EVAL FOR 150MSPS AD6655AD6655-125EBZ - BOARD EVAL W/AD6655 & SOFTWARE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD6655
Pin No.
Digital Input
52
Digital Outputs
12
13
14
15
16
17
18
19
22
23
25
26
27
28
58
59
60
61
62
63
2
3
4
5
6
7
8
9
11
10
SPI Control
48
47
51
Signal Monitor Port
33
35
34
Mnemonic
SYNC
D0A (LSB)
D1A
D2A
D3A
D4A
D5A
D6A
D7A
D8A
D9A
D10A
D11A
D12A
D13A (MSB)
D0B (LSB)
D1B
D2B
D3B
D4B
D5B
D6B
D7B
D8B
D9B
D10B
D11B
D12B
D13B (MSB)
DCOA
DCOB
SCLK/DFS
SDIO/DCS
CSB
SMI SDO/OEB
SMI SDFS
SMI SCLK/PDWN
Type
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input/Output
Input
Input/Output
Output
Input/Output
Description
Digital Synchronization Pin. Slave mode only.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel A CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel B CMOS Output Data.
Channel A Data Clock Output.
Channel B Data Clock Output.
SPI Serial Clock/Data Format Select Pin in External Pin Mode.
SPI Serial Data I/O/Duty Cycle Stabilizer Pin in External Pin Mode.
SPI Chip Select. Active low.
Signal Monitor Serial Data Output/Output Enable Input (Active Low) in External Pin Mode.
Signal Monitor Serial Data Frame Sync.
Signal Monitor Serial Clock Output/Power-Down Input (Active High) in External Pin Mode.
Rev. A | Page 20 of 88